INES Mapper 031: Difference between revisions

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'''iNES Mapper 031''' represents a mapper created to facilitate cartridge compilations of [[NSF]] music. It implements a common subset of the features used by NSFs.
{{Infobox_iNES_mapper
|name=NSF subset
|company=varies (homebrew)
|boards=unknown (homebrew)
|mapper=31
|complexity=CPLD
|prgmax=1024K
|prgpage=4K
|chrmax=8K
|chrpage=n/a
|busconflicts=Not applicable
}}'''iNES Mapper 031''' represents a mapper created to facilitate cartridge compilations of [[NSF]] music. It implements a common subset of the features used by NSFs.


PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on.
PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on.
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* ''ZENSF'' ([//forums.nesdev.org/viewtopic.php?f=6&t=17698 forum post])
* ''ZENSF'' ([//forums.nesdev.org/viewtopic.php?f=6&t=17698 forum post])
* ''Test ROMs'' ([//forums.nesdev.org/viewtopic.php?f=3&t=13120 forum post])
* ''Test ROMs'' ([//forums.nesdev.org/viewtopic.php?f=3&t=13120 forum post])
== Overview ==
* PRG ROM size: Up to 1024 kB
* PRG ROM bank size: 4 kB
* PRG RAM: None
* CHR capacity: 8 kB RAM/ROM
* CHR bank size: Not bankswitched
* Nametable [[mirroring]]: horizontal or vertical, hard wired.
* Subject to [[bus conflict]]s: No


== Registers ==
== Registers ==

Latest revision as of 04:15, 3 May 2022

NSF subset
Company varies (homebrew)
Complexity CPLD
Boards unknown (homebrew)
PRG ROM capacity 1024K
PRG ROM window 4K
PRG RAM capacity None
CHR capacity 8K
CHR window n/a
Nametable mirroring Fixed H or V, controlled by solder pads
Bus conflicts Not applicable
IRQ No
Audio No
iNES mappers 031

iNES Mapper 031 represents a mapper created to facilitate cartridge compilations of NSF music. It implements a common subset of the features used by NSFs.

PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on.

There is no CHR banking, so it is recommended to use 8 kB CHR-RAM with this mapper.

As with BNROM and UxROM, there is no mirroring, CHR bank, or IRQ control; this mapper has hardwired H or V mirroring.

Examples:

Registers

PRG bank select $5000-$5FFF

address              data
15      bit       0  7  bit  0
-------------------  ---------
0101 .... .... .AAA  PPPP PPPP
                |||  |||| ||||
                |||  ++++-++++- Select 4 kB PRG ROM bank at slot specified by write address.
                +++------------ Specify 4 kB bank slot at: $8000 + (AAA * $1000)

The canonical write position for these registers is $5FF8-$5FFF, as used in NSFs.

At power on, the register at $5FFF is set to $FF. Startup code should be placed in the last bank. There is no change to this register on reset.

References

Emulator support

Cartridges: