Clock rate: Difference between revisions
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| Side borders | | Side borders | ||
| Palette entry at $3F00 | | [[PPU_palettes|Palette]] entry at $3F00 | ||
| Always black ($1D), intruding on left and right 2 pixels of picture | | Always black ($1D), intruding on left and right 2 pixels of picture | ||
| Like PAL | | Like PAL |
Revision as of 00:49, 14 March 2015
The clock rate of various components in the NES differs between consoles in the USA and Europe due to the different television standards used (NTSC M vs. PAL B). The color encoding method used by the NES (see NTSC video) requires that the master clock frequency be six times that of the color subcarrier, but this frequency is about 24% higher on PAL than on NTSC. In addition, PAL has more scanlines per field and fewer fields per second than NTSC. Furthermore, the PAL CPU's master clock could have been divided by 15 to preserve the ratio between CPU and PPU speeds, but Nintendo chose to keep the Johnson counter structure, which always has an even period, and divide by 16 instead. So the main differences between the NTSC and PAL PPUs are depicted in the below chart:
Property | NTSC (2C02) | PAL (2C07) | Dendy | RGB (2C03) | RGB (2C04) | RGB (2C05) |
---|---|---|---|---|---|---|
Master clock speed | 21.477272 MHz ± 40 Hz 236.25 MHz ÷ 11 by definition |
26601712 Hz ± ? 26601712.5 Hz by definition |
Like PAL | Like NTSC | Like NTSC | |
PPU clock speed | 21.477272 MHz ÷ 4 | 26.601712 MHz ÷ 5 | Like PAL | Like NTSC | Like NTSC | |
Corresponding CPU clock speed | 21.47 MHz ÷ 12 = 1.789773 MHz 3 dots per CPU cycle Same as NTSC Amiga clock ÷ 4 |
26.60 MHz ÷ 16 = 1.662607 MHz 3⅕ dots per CPU cycle |
26.60 MHz ÷ 15 = 1.773448 MHz 3 dots per CPU cycle Same as PAL Amiga clock ÷ 4 |
Like NTSC | Like NTSC | |
Height of picture | 240 scanlines | Like NTSC | Like NTSC | |||
Nominal visible picture height (see Overscan) | 224 scanlines | 268 scanlines | Like PAL | Like NTSC | Like NTSC | |
"Post-render" blanking lines between end of picture and NMI | 1 scanline | 1 scanline | 51 scanlines | Like NTSC | Like NTSC | |
Length of vertical blanking after NMI | 20 scanlines | 70 scanlines | 20 scanlines | Like NTSC | Like NTSC | |
Time during which OAM can be written | Vertical or forced blanking | Only during first 20 scanlines after NMI | Like NTSC | Like NTSC | Like NTSC | |
"Pre-render" lines between vertical blanking and next picture | 1 scanline | Like NTSC | Like NTSC | |||
Total number of dots per frame | 341 × 261 + 340.5 = 89341.5 (pre-render line is one dot shorter in every other frame) |
341 × 312 = 106392 | Like PAL | |||
Vertical scan rate | 60.0988 Hz | 50.0070 Hz | Like PAL | |||
Color of top and bottom borders | N/A | Always black ($1D) | Like PAL | |||
Side borders | Palette entry at $3F00 | Always black ($1D), intruding on left and right 2 pixels of picture | Like PAL | |||
Color emphasis (with correlating bit in PPUMASK) |
Blue (D7), green (D6), red (D5) | Blue (D7), red (D6), green (D5) | Like PAL | Blue, green, red (full scale) | Blue, green, red (full scale) | |
Other quirks | Permutated palette | PPU registers $2000 and $2001 are swapped; revision ID in $2002 |
The 2C03, 2C04, and 2C05 PPUs were all found in Nintendo's PlayChoice-10 (a.k.a. PC10 or PC-10) arcade systems. Famicom Titler, Famicom TVs, and RGB-modded NES consoles would use either the 2C03 or a 2C05 with glue logic to unswap $2000 and $2001. (Later RGB mods used a 2C02 in output mode and faked out all palette logic.)
The color emphasis bits on the PAL NES have their red and bits http://wiki.nesdev.org/w/index.php/PPU_registers#Mask_.28.242001.29_.3E_write
The authentic NES sold in Brazil is an NTSC NES with an adapter board to turn the NTSC video into PAL-M video, a variant of PAL using NTSC frequencies but PAL's color modulation.
Dendy is a clone of the Famicom distributed by Steepler and sold in Russia. Because not many people in the English-speaking NESdev community have a Dendy, its precise differences from the authentic Nintendo hardware are not completely understood, and the values above are partly conjecture. But it is known that the chipset in Dendy and several other PAL famiclones is designed for compatibility with Famicom games, including games with CPU cycle counting mappers (e.g. VRC4) and games that use a cycle-timed NMI handler (e.g. Balloon Fight). This explains the faster CPU divider and longer post-render period vs. the authentic PAL NES.
To compensate for these differences, you can detect the TV system at power-on.