CPU variants: Difference between revisions
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(Eugene.S PMed me some extra information to put here) |
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[[File:Ua6527p old.png]] [[File:Ua6527p new.png]] | [[File:Ua6527p old.png]] [[File:Ua6527p new.png]] | ||
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| UA6540 || UMC-made clone of | | UA6540 || UMC-made clone of 2A07 [https://forums.nesdev.org/viewtopic.php?t=17257]. Has swapped pulse duty cycles. | ||
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| UM6557 || Believed to be a 100% duplicate of UA6527, for use in SECAM regions. | | UM6557 || Believed to be a 100% duplicate of UA6527, for use in SECAM regions. | ||
|- | |- | ||
| | | UM6561xx-1 || NES-on-a-chip for NTSC. Revisions "xx" AF, BF, CF, F known. Earlier revisions (which?) CPU half believed identical to UA6527; later revisions correct pulse channel duties. | ||
|- | |- | ||
| T1818P || ??-made NES-on-a-chip[[//forums.nesdev.org/viewtopic.php?p=228515#p228515] | | UM6561xx-2 || NES-on-a-chip for PAL-B. Revisions "xx" AF, BF, CF, F known. Earlier revisions (which?) CPU half believed identical to UA6527P; later revisions correct pulse channel duties. | ||
|- | |||
| T1818 || ??-made NES-on-a-chip, NTSC timing. Believed to exist, but evidence currently scant. | |||
|- | |||
| T1818P || ??-made NES-on-a-chip[[//forums.nesdev.org/viewtopic.php?p=228515#p228515]. Requires external 2 KiB RAMs for CPU and PPU. Swapped pulse duty cycles. | |||
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| TA-03N || ??-made clone of 2A03G | | TA-03N || ??-made clone of 2A03G | ||
Revision as of 19:03, 6 January 2019
Beyond the well-studied 2A03G, we know of the following CPU revisions, both made by Ricoh and other manufacturers:
| RP2A03 | M2 duty cycle is 3/4 instead of 5/8. Lacks tonal noise mode. Has broken and disabled programmable interval timer on-die. Other differences? |
| RP2A03E | no known differences |
| RP2A03G | reference model |
| RP2A03H | no known differences |
| RP2A04 | Not actually a CPU at all, just a jumper in a 40-pin PDIP |
| RP2A07 | input clock divider is 16. Changes to noise, DPCM, frame timer tables. Fixed DPCM RDY address bus glitches. Other differences? |
| RP2A07A | no known differences relative to 2A07letterless |
| MG-P-501 | Micro Genius-made clone. No specifics known. |
| UA6527 | UMC-made clone of 2A03G. Has swapped pulse channel duty cycles. |
| UA6527P | UMC-made clone of 2A03G for compatibility with NTSC software in PAL countries. input clock divider is 15. Otherwise believed same as 6527.
Two revisions exist: before mid-1990 (which has UMC logo on left) and after-mid-1990 (which has UMC logo on top). It is said that old UMC CPU has broken DMC reader function [1]. At least some of CodeMasters' games behave differently on them.
|
| UA6540 | UMC-made clone of 2A07 [2]. Has swapped pulse duty cycles. |
| UM6557 | Believed to be a 100% duplicate of UA6527, for use in SECAM regions. |
| UM6561xx-1 | NES-on-a-chip for NTSC. Revisions "xx" AF, BF, CF, F known. Earlier revisions (which?) CPU half believed identical to UA6527; later revisions correct pulse channel duties. |
| UM6561xx-2 | NES-on-a-chip for PAL-B. Revisions "xx" AF, BF, CF, F known. Earlier revisions (which?) CPU half believed identical to UA6527P; later revisions correct pulse channel duties. |
| T1818 | ??-made NES-on-a-chip, NTSC timing. Believed to exist, but evidence currently scant. |
| T1818P | ??-made NES-on-a-chip[[3]. Requires external 2 KiB RAMs for CPU and PPU. Swapped pulse duty cycles. |
| TA-03N | ??-made clone of 2A03G |
| TA-03NP | ??-made clone of 2A03G for NTSC compatibility in PAL countries. Input clock divider is 15. |
| TA-03NP1 | ??-made clone of 2A03G for NTSC compatibility in PAL countries. Input clock divider is 15. Fixed DPCM problems? |
| PM03 | Gradiente-made clone of 2A03G. [4] |
If you know of other differences or other revisions, please add them!
