CPU memory map: Difference between revisions
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(I'd recommend against adding mapper ports that overlap the APU test area) |
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{| class="tabular" | {| class="tabular" | ||
! | ! First address || Size || Device | ||
|- | |- | ||
| $0000 || $0800 || 2KB internal RAM | | $0000 || $0800 || 2KB internal RAM | ||
| Line 14: | Line 14: | ||
| $2008 || $1FF8 || Mirrors of $2000 every 8 bytes | | $2008 || $1FF8 || Mirrors of $2000 every 8 bytes | ||
|- | |- | ||
| $4000 || $ | | $4000 || $0020 || [[APU|NES APU]] and [[2A03|I/O registers]] | ||
|- | |- | ||
| $ | | $4020 || $BFE0 || Cartridge space: PRG ROM, PRG RAM, and [[mapper]] registers (See Note) | ||
|} | |} | ||
Note: Most | Note: Most common boards address ROM and Save/Work RAM in this format, especially in common iNES mappers: | ||
*$6000-$7FFF = Battery Backed Save or Work RAM | *$6000-$7FFF = Battery Backed Save or Work RAM | ||
Revision as of 01:06, 1 March 2013
| First address | Size | Device |
|---|---|---|
| $0000 | $0800 | 2KB internal RAM |
| $0800 | $0800 | Mirrors of $0000-$07FF |
| $1000 | $0800 | |
| $1800 | $0800 | |
| $2000 | $0008 | NES PPU registers |
| $2008 | $1FF8 | Mirrors of $2000 every 8 bytes |
| $4000 | $0020 | NES APU and I/O registers |
| $4020 | $BFE0 | Cartridge space: PRG ROM, PRG RAM, and mapper registers (See Note) |
Note: Most common boards address ROM and Save/Work RAM in this format, especially in common iNES mappers:
- $6000-$7FFF = Battery Backed Save or Work RAM
- $8000-$FFF9 = Usual ROM, commonly with Mapper Registers (see MMC1 and UxROM for example)
The CPU expects three addresses called "vectors" in fixed places at the end of the cartridge space, like so:
- $FFFA-$FFFB = NMI vector
- $FFFC-$FFFD = Reset vector
- $FFFE-$FFFF = IRQ/BRK vector
Any mapper that switches $E000-$FFF9 will switch $FFFA-$FFFF along with it. If a mapper doesn't fix $C000-$FFFF to the last bank or use some sort of reset detection, the vectors need to be stored in all banks.
