|
|
| (13 intermediate revisions by 7 users not shown) |
| Line 1: |
Line 1: |
| [[Category:ASIC mappers]] | | #REDIRECT [[VRC2 and VRC4]] |
| The Konami VRC4 is an [[:Category:ASIC mappers|ASIC]] [[MMC|mapper]].
| |
| | |
| | |
| __TOC__
| |
| | |
| | |
| == Overview ==
| |
| * PRG ROM size: Up to 256 KB
| |
| * PRG ROM bank size: 8 KB at $A000, and $8000 OR $C000
| |
| * PRG RAM: Up to 8 KB
| |
| * CHR bank size: 1 KB
| |
| * Nametable [[mirroring]]: Controlled by mapper
| |
| * Subject to [[bus conflict]]s: No
| |
| | |
| The Konami VRC4 is almost identical to the [[VRC2|VRC2]], but with a bit more capabilities, such as the option to swap PRG at $C000 instead of $8000 and an IRQ counter.
| |
| | |
| See [[VRC4 pinout]] for chip pinout.
| |
| | |
| == Revisions ==
| |
| | |
| This mapper has been used with several board revisions, each of which uses different address lines.
| |
| All boards use A15-A12 the same way, along with two lines from A7-A0.
| |
| Here is a listing of known revisions, which address lines are used, and which [[iNES]] mapper number is used to represent it:
| |
| | |
| variant lines registers iNES Mapper Number
| |
| ----------------------------------------------------------------------
| |
| VRC4a A1, A2 $x000, $x002, $x004, $x006 [[INES Mapper 021|021]]
| |
| VRC4b A1, A0 $x000, $x002, $x001, $x003 025
| |
| VRC4c A6, A7 $x000, $x040, $x080, $x0C0 021
| |
| VRC4d A3, A2 $x000, $x008, $x004, $x00C 025
| |
| VRC4e A2, A3 $x000, $x004, $x008, $x00C 023
| |
| VRC4 #27 A0, A1 $x000, $x001, $x002, $x003 [[iNES Mapper 027|027]]
| |
| | |
| Some variants that use the same address lines use them in different ways. For example, VRC4d and VRC4e both use A2 and A3, however VRC4d has them reversed.
| |
| | |
| For historical reasons, some variants share a mapper number.
| |
| These may be detected with a hash of the PRG ROM, or the address lines used may be expressed in NES 2.0 with [[NES 2.0 submappers#VRC4|submappers]].
| |
| | |
| This page lists registers as they are in the VRC4a variant. For other variants, you can use the diagram above for determining which registers are used.
| |
| | |
| == Registers ==
| |
| | |
| === PRG Swap Mode control ($9004, $9006) ===
| |
| | |
| 7 bit 0
| |
| ---------
| |
| .... ..M.
| |
| |
| |
| +-- Swap Mode
| |
| | |
| When 'M' is clear:
| |
| * the 8 KB page at $8000 is controlled by the $800x register
| |
| * the 8 KB page at $C000 is fixed to the second last 8 KB in the ROM
| |
| | |
| When 'M' is set:
| |
| * the 8 KB page at $8000 is fixed to the second last 8 KB in the ROM
| |
| * the 8 KB page at $C000 is controlled by the $800x register
| |
| | |
| | |
| === PRG Select 0 ($8000, $8002, $8004, $8006) ===
| |
| | |
| 7 bit 0
| |
| ---------
| |
| ...P PPPP
| |
| | ||||
| |
| +-++++- Select 8 KB PRG bank at $8000 or $C000 depending on Swap Mode
| |
| | |
| === PRG Select 1 ($A000, $A002, $A004, $A006) ===
| |
| | |
| 7 bit 0
| |
| ---------
| |
| ...P PPPP
| |
| | ||||
| |
| +-++++- Select 8 KB PRG bank at $A000
| |
| | |
| | |
| === Mirroring Control ($9000, $9002) ===
| |
| | |
| 7 bit 0
| |
| ---------
| |
| .... ..MM
| |
| ||
| |
| ++- [[Mirroring]] (0: vertical; 1: horizontal;
| |
| 2: one-screen, lower bank; 3: one-screen, upper bank;)
| |
| | |
| | |
| === CHR Select 0 ($B000 + $B002) ===
| |
| | |
| $B000 $B002
| |
| 7 bit 0 7 bit 0
| |
| --------- ---------
| |
| .... LLLL .... HHHH
| |
| |||| ||||
| |
| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0000
| |
| ++++-------------- Low 4-bits
| |
| | |
| | |
| === CHR Select 1 ($B004 + $B006) ===
| |
| | |
| $B004 $B006
| |
| 7 bit 0 7 bit 0
| |
| --------- ---------
| |
| .... LLLL .... HHHH
| |
| |||| ||||
| |
| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0400
| |
| ++++-------------- Low 4-bits
| |
| | |
| | |
| === CHR Select 2 ($C000 + $C002) ===
| |
| | |
| $C000 $C002
| |
| 7 bit 0 7 bit 0
| |
| --------- ---------
| |
| .... LLLL .... HHHH
| |
| |||| ||||
| |
| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0800
| |
| ++++-------------- Low 4-bits
| |
| | |
| | |
| === CHR Select 3 ($C004 + $C006) ===
| |
| | |
| $C004 $C006
| |
| 7 bit 0 7 bit 0
| |
| --------- ---------
| |
| .... LLLL .... HHHH
| |
| |||| ||||
| |
| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0C00
| |
| ++++-------------- Low 4-bits
| |
| | |
| | |
| | |
| === CHR Select 4 ($D000 + $D002) ===
| |
| | |
| $D000 $D002
| |
| 7 bit 0 7 bit 0
| |
| --------- ---------
| |
| .... LLLL .... HHHH
| |
| |||| ||||
| |
| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1000
| |
| ++++-------------- Low 4-bits
| |
| | |
| | |
| === CHR Select 5 ($D004 + $D006) ===
| |
| | |
| $D004 $D006
| |
| 7 bit 0 7 bit 0
| |
| --------- ---------
| |
| .... LLLL .... HHHH
| |
| |||| ||||
| |
| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1400
| |
| ++++-------------- Low 4-bits
| |
| | |
| | |
| === CHR Select 6 ($E000 + $E002) ===
| |
| | |
| $E000 $E002
| |
| 7 bit 0 7 bit 0
| |
| --------- ---------
| |
| .... LLLL .... HHHH
| |
| |||| ||||
| |
| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1800
| |
| ++++-------------- Low 4-bits
| |
| | |
| | |
| === CHR Select 7 ($E004 + $E006) ===
| |
| | |
| $E004 $E006
| |
| 7 bit 0 7 bit 0
| |
| --------- ---------
| |
| .... LLLL .... HHHH
| |
| |||| ||||
| |
| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1C00
| |
| ++++-------------- Low 4-bits
| |
| | |
| | |
| === IRQ Control ($F00x) ===
| |
| | |
| <pre>
| |
| $F000: IRQ Latch, low 4 bits
| |
| $F002: IRQ Latch, high 4 bits
| |
| $F004: IRQ Control
| |
| $F006: IRQ Acknowledge
| |
| </pre>
| |
| | |
| | |
| Many VRC mappers use the same IRQ system. For details on IRQ operation, see [[VRC IRQ]]s.
| |
