VRC1: Difference between revisions

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(→‎Mirroring Control, CHR bits ($9000-$9FFF): Vs. System (formerly mapper 151))
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{{Infobox_iNES_mapper
|name=VRC1
|company=Konami
|mapper=75
|nescartdbgames=6
|complexity=ASIC
|boards=JF-20, JF-22, 4036, 302114A, 350459
|pinout=VRC1 pinout
|prgmax=128K
|prgpage=8K
|wrammax=none
|wrampage=n/a
|chrmax=128K
|chrpage=4K
|mirroring=H or V, switchable
|busconflicts=No
|irq=No
}}
[[Category:ASIC mappers]][[Category:in NesCartDB]]
[[Category:ASIC mappers]][[Category:in NesCartDB]]
The Konami VRC1 is an [[:Category:ASIC mappers|ASIC]] [[MMC|mapper]]. The [[iNES]] format assigns [[iNES Mapper 075]] to VRC1.
The Konami VRC1 is an [[:Category:ASIC mappers|ASIC]] [[MMC|mapper]]. The [[iNES]] format assigns '''mapper 75''' to VRC1.


The VRC1 was used in several Famicom games released by Konami and Jaleco:
* ''Exciting Boxing''
* ''Ganbare Goemon! Karakuri Douchuu''
* ''Jajamaru Ninpouchou''
* ''King Kong 2: Ikari no Megaton Punch''
* ''Moero!! Junior Basket: Two on Two''
* ''Tetsuwan Atom''


__TOC__
__TOC__




== Overview ==
== Banks ==
* PRG ROM size: Up to 128 KB
* CPU $8000-$9FFF: 8 KiB switchable PRG ROM bank
* PRG ROM bank size: 8 KB at $8000, $A000, and $C000
* CPU $A000-$BFFF: 8 KiB switchable PRG ROM bank
* PRG RAM: None
* CPU $C000-$DFFF: 8 KiB switchable PRG ROM bank
* CHR bank size: 4 KB
* CPU $E000-$FFFF: 8 KiB PRG ROM bank, fixed to the last bank
* Nametable [[mirroring]]: Controlled by mapper
* PPU $0000-$0FFF: 4 KiB switchable CHR bank
* Subject to [[bus conflict]]s: No
* PPU $1000-$1FFF: 4 KiB switchable CHR bank
 
See [[VRC1 pinout]] for chip pinout.


== Registers ==
== Registers ==
Line 77: Line 100:
These bits combined with bit 2 of $9000 make a 5-bit CHR selection.
These bits combined with bit 2 of $9000 make a 5-bit CHR selection.


== Disch's Notes ==
==References==
  Here are Disch's original notes: 
* [http://www.romhacking.net/documents/362/ Disch's Mapper Notes]
  ========================
  =  Mapper 075          =
  ========================
 
 
  aka:
  --------------------------
  VRC1
 
 
  Example Games:
  --------------------------
  Tetsuwan Atom
  Ganbare Goemon! - Karakuri Douchuu
 
 
 
  Registers:
  --------------------------
 
  Range,Mask:  $8000-FFFF, $F000
 
    $8000:  [.... PPPP]  PRG Reg 0 (8k @ $8000)
    $A000:  [.... PPPP]   PRG Reg 1 (8k @ $A000)
    $C000:  [.... PPPP]  PRG Reg 2 (8k @ $C000)
 
    $9000:  [.... .BAM]  Mirroring, CHR reg high bits
      M = Mirroring (0=Vert, 1=Horz)
      A = High bit of CHR Reg 0
      B = High bit of CHR Reg 1
 
    $E000:  [.... CCCC]  Low 4 bits of CHR Reg 0 (4k @ $0000)
    $F000:  [.... CCCC]  Low 4 bits of CHR Reg 1 (4k @ $1000)
 
 
  PRG Setup:
  ---------------------------
        $8000  $A000  $C000  $E000 
      +-------+-------+-------+-------+
      | $8000 | $A000 | $C000 | { -1} |
      +-------+-------+-------+-------+
 
 
  CHR Setup:
  ---------------------------
 
    CHR regs are 5 bits wide.  The low 4 bits of each reg are set by $E000 and $F000, and the high bit is taken
  from the appropriate bits of $9000.
 
        $0000  $0400  $0800  $0C00  $1000  $1400  $1800  $1C00
      +-------------------------------+-------------------------------+
      |      $9000.1 + $E000        |      $9000.2 + $F000        |
      +-------------------------------+-------------------------------+

Latest revision as of 16:29, 26 January 2019

VRC1
Company Konami
Games 6 in NesCartDB
Complexity ASIC
Boards JF-20, JF-22, 4036, 302114A, 350459
Pinout VRC1 pinout
PRG ROM capacity 128K
PRG ROM window 8K
PRG RAM capacity none
PRG RAM window n/a
CHR capacity 128K
CHR window 4K
Nametable mirroring H or V, switchable
Bus conflicts No
IRQ No
Audio No
iNES mappers 075

The Konami VRC1 is an ASIC mapper. The iNES format assigns mapper 75 to VRC1.

The VRC1 was used in several Famicom games released by Konami and Jaleco:

  • Exciting Boxing
  • Ganbare Goemon! Karakuri Douchuu
  • Jajamaru Ninpouchou
  • King Kong 2: Ikari no Megaton Punch
  • Moero!! Junior Basket: Two on Two
  • Tetsuwan Atom


Banks

  • CPU $8000-$9FFF: 8 KiB switchable PRG ROM bank
  • CPU $A000-$BFFF: 8 KiB switchable PRG ROM bank
  • CPU $C000-$DFFF: 8 KiB switchable PRG ROM bank
  • CPU $E000-$FFFF: 8 KiB PRG ROM bank, fixed to the last bank
  • PPU $0000-$0FFF: 4 KiB switchable CHR bank
  • PPU $1000-$1FFF: 4 KiB switchable CHR bank

Registers

PRG Select 0 ($8000-$8FFF)

7  bit  0
---------
.... PPPP
     ||||
     ++++- Select 8 KB PRG ROM at $8000

PRG Select 1 ($A000-$AFFF)

7  bit  0
---------
.... PPPP
     ||||
     ++++- Select 8 KB PRG ROM at $A000


PRG Select 2 ($C000-$CFFF)

7  bit  0
---------
.... PPPP
     ||||
     ++++- Select 8 KB PRG ROM at $C000


Mirroring Control, CHR bits ($9000-$9FFF)

7  bit  0
---------
.... .BAM
      |||
      ||+- Mirroring  (0: Vertical; 1: Horizontal)
      |+-- High Bit of 4 KB CHR bank at PPU $0000
      +--- High Bit of 4 KB CHR bank at PPU $1000

The mirroring bit is ignored if the cartridge is wired for 4-screen VRAM, as is typical for Vs. System games using the VRC1.

CHR Select 0 ($E000-$EFFF)

7  bit  0
---------
.... CCCC
     ||||
     ++++- Low 4 bits of 4 KB CHR bank at PPU $0000

These bits combined with bit 1 of $9000 make a 5-bit CHR selection.


CHR Select 1 ($F000-$FFFF)

7  bit  0
---------
.... CCCC
     ||||
     ++++- Low 4 bits of 4 KB CHR bank at PPU $1000

These bits combined with bit 2 of $9000 make a 5-bit CHR selection.

References

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