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| "[http://nesdev.parodius.com/loopyppu.zip The skinny on NES scrolling]" was posted by loopy on 1999-04-13 to what eventually became the NESdev Yahoo! Group.
| | #REDIRECT [[PPU scrolling]] |
| It was the first to publicly tell how exactly how the PPU uses addresses written to [[PPU registers|its ports]].
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| After over a decade, it is ''still believed accurate.''
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| Some people get turned off by the fact that it's provided as monospaced text inside a zipfile, that addresses have nothing to distinguish them from years, and that the diagrams of what bits get copied where are allegedly difficult to read.
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| What follows is this document, reformatted to web standards, with a few minor things made slightly clearer.
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| == PPU registers ==
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| Games using complex raster effects require a complete understanding of how the various address registers inside the PPU work.
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| Here are the related registers:
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| ;v: Current VRAM address (15 bits)
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| ;t: Temporary VRAM address (15 bits)
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| ;x: Fine X scroll (3 bits)
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| Registers ''v'' and ''t'' are 15 bits, but because emulators commonly store them in 16-bit machine words, they are shown with an extra bit that's never used.
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| The PPU uses the current VRAM address for both reading and writing PPU memory thru $2007, and for fetching nametable data to draw the background.
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| As it's drawing the background, it updates the address to point to the nametable data currently being drawn.
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| Bits 10-11 hold the nametable address minus $2000.
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| Bits 12-14 are the Y offset of a scanline within a tile.
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| == Stuff that affects register contents ==
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| In the following, ''d'' refers to the data written to the port, and ''A'' through ''H'' to individual bits of this value.
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| $2000 write:
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| t:....BA.. ........ = d:......BA
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| $2005 first write:
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| t:........ ...HGFED = d:HGFED...
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| x: CBA = d:.....CBA
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| $2005 second write:
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| t:......HG FED..... = d:HGFED...
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| t:.CBA.... ........ = d:.....CBA
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| $2006 first write:
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| t:..FEDCBA ........ = d:..FEDCBA
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| t:.G...... ........ = 0
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| $2006 second write:
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| t:........ HGFEDCBA = d:HGFEDCBA
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| v = t
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| At the end of each scanline, if rendering is turned on, the PPU copies all bits related to horizontal position from ''t'' to ''v'':
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| v:.....H.. ...EDCBA = t:.....H.. ...EDCBA
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| And at the end of the pre-render scanline, if rendering is turned on, the PPU copies all bits from ''t'' to ''v'':
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| v = t
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| Note: $2005 and $2006 share the toggle that selects between first/second writes.
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| Reading $2002 will clear it.
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| All of this info agrees with the tests Loopy has run on an NES console.
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| If there's something you don't agree with, please let [http://nesdev.org/bbs/ the BBS] know so that a member can verify it.
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| == Wrapping around ==
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| You can think of bits 4-0 of the VRAM address as the "coarse x scroll"(*8) that the PPU increments as it draws.
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| As it wraps from 31 to 0, bit 10 is switched.
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| You should see how this causes horizontal wrapping between nametables (0,1) and (2,3).
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| You can think of bits 9-5 as the "coarse y scroll"(*8).
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| This functions slightly different from the X.
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| It wraps to 0 and bit 11 is switched when it's incremented from 29 instead of 31.
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| There are some odd side effects from this.
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| If you manually set the value above 29 (from either $2005 or $2006), the wrapping from 29 obviously won't happen, and attribute data will be used as nametable data.
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| The "y scroll" still wraps to 0 from 31, but without switching bit 11.
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| This explains why writing 240+ to 'Y' in $2005 appeared as a negative scroll value.
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