Taito X1-005 pinout: Difference between revisions
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Taito X1-005: 48-pin 0.6" PDIP (Canonically [[iNES Mapper 080|mapper 80]]). | [[Category:Pinouts]]Taito X1-005: 48-pin 0.6" PDIP (Canonically [[iNES Mapper 080|mapper 80]]). | ||
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Revision as of 20:38, 11 March 2013
Taito X1-005: 48-pin 0.6" PDIP (Canonically mapper 80).
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NC -- |01 48| -- VCC
(F) M2 -> |02 47| -> PRG A17 (r)
(s) CPU A12 -> |03 46| -> PRG A15 (r)
(F) CPU A13 -> |04 45| -> PRG A14 (r)
(F) CPU A14 -> |05 44| -> PRG A13 (r)
(s) CPU A6 -> |06 43| <- PRG A8 (s)
(s) CPU A5 -> |07 42| <- PRG A9 (s)
(s) CPU A4 -> |08 41| <- PRG A11 (s)
(s) CPU A3 -> |09 40| -> PRG A16 (r)
(s) CPU A2 -> |10 39| <- PRG A10 (s)
(s) CPU A1 -> |11 38| <- PRG /CE (s)
(s) CPU A0 -> |12 37| <> PRG D7 (s)
(s) CPU D0 <> |13 36| <> PRG D6 (s)
(s) CPU D1 <> |14 35| <> PRG D5 (s)
(s) CPU D2 <> |15 34| <> PRG D4 (s)
(F) CPU R/W -> |16 33| <> PRG D3 (s)
(r) CHR A17 <- |17 32| -- NC
GND -- |18 31| -> CIRAM A10 (F)
(r) CHR A15 <- |19 30| -> CHR A14 (r)
(r) CHR A12 <- |20 29| -> CHR A13 (r)
(F) PPU A10 -> |21 28| -> CHR A11 (r)
(F) PPU A11 -> |22 27| -> CHR A16 (r)
(F) PPU A12 -> |23 26| -> CHR A10 (r)
GND -- |24 25| -- NC
`--------'
Variant pinout for mapper 207:
(F) CIRAM A10 <- |17 32| -- NC
GND -- |18 31| -> NC
