User contributions for Ben Boldt
From NESdev Wiki
Jump to navigationJump to search
25 August 2024
- 01:1701:17, 25 August 2024 diff hist +163 Namco 163 audio →Address Port ($F800-$FFFF): Added note about DMA multiple reads in auto-increment mode. current
6 June 2024
- 23:3523:35, 6 June 2024 diff hist +90 m Famicom Network System →Data Bus Behavior current
- 23:2723:27, 6 June 2024 diff hist +315 Famicom Network System →LH5323M1 Kanji Graphic ROM: Kanji ROM data access details.
- 23:1723:17, 6 June 2024 diff hist +164 Famicom Network System →RF5C66 Mapper and Disk Drive Controller: Noting that Kanji ROM /CE does go low for writes in the range $5000-5FFF, thereby preventing a card putting multi-mapper supervisor registers there ala mindkids/coolgirl.
28 May 2024
- 17:4817:48, 28 May 2024 diff hist +1,141 Famicom Network System - Updated naming of CIC signals. Verified $40C0 bits 7, 1, and 0 were listed correctly.
27 May 2024
- 21:0221:02, 27 May 2024 diff hist +18 m Famicom Network System →Pinouts
- 20:5220:52, 27 May 2024 diff hist 0 m Famicom Network System →8634A Tsuushin Card CIC Lock Chip
26 May 2024
- 21:4021:40, 26 May 2024 diff hist +45 Famicom Network System →8633 Famicom Network System CIC Key Chip: Update names of pins 10,11,12,15.
- 21:3821:38, 26 May 2024 diff hist +217 Famicom Network System →RF5C66 Mapper and Disk Drive Controller: Updated errors about CIC pins 29,31,32.
24 May 2024
- 22:0822:08, 24 May 2024 diff hist +724 Famicom Network System →Pinouts: Updated CIC pinouts.
23 May 2024
- 22:2722:27, 23 May 2024 diff hist 0 m Famicom Network System →P2: Tsuushin Card Connector: Same data direction change in the Tuushin card pinout.
- 22:2522:25, 23 May 2024 diff hist 0 m Famicom Network System →Pinouts: Updated the data directions of pins 1 and 2 of the CIC chips. I verified this by taping the applicable pins on the edge connector and probing on the card. CIC Pin 1 was an output on the card, in keeping with NES CIC chips.
- 00:4000:40, 23 May 2024 diff hist +103 Famicom Network System →Data Bus Behavior: Added measurement of buffer propagation delay.
- 00:3900:39, 23 May 2024 diff hist +51 m Famicom Network System →RF5C66 Mapper and Disk Drive Controller: Added detail in pinout for pin 29 affecting Card R/W.
- 00:3700:37, 23 May 2024 diff hist +504 Famicom Network System →Data Bus Behavior: Added note about CIC preventing writes, how that may apply to the data bus buffer.
- 00:2400:24, 23 May 2024 diff hist +101 Famicom Network System →System Overview: Added info about CPU R/W being buffered similar to the data bus, and how that is affected by CIC failure and the lid switch.
17 May 2024
- 17:0917:09, 17 May 2024 diff hist +138 Famicom Network System →P2: Tsuushin Card Connector: Added note about 0.04" pin pitch. When I eventually have a working card, I will provide better info.
14 May 2024
- 18:3818:38, 14 May 2024 diff hist +19 m CPU variants →See also: Cross-link CPU Variants and PPU Variants in See Also sections.
- 18:3818:38, 14 May 2024 diff hist +19 m PPU variants →See also: Cross-link CPU Variants and PPU Variants in See Also sections.
30 April 2024
- 23:4523:45, 30 April 2024 diff hist +270 m Famicom Network System "card" -> "tsuushin card", "NES" -> "Famicom". Added external links.
22 April 2024
- 23:3823:38, 22 April 2024 diff hist +240 Talk:Family Computer Disk System →FDS current
2 April 2024
- 14:4814:48, 2 April 2024 diff hist +220 MMC5 →Scanline IRQ Status ($5204, read/write): Clarified that the scanline does not reset from a scanline interrupt.
- 07:3907:39, 2 April 2024 diff hist +198 MMC5 →Scanline Detection and Scanline IRQ: updated a couple things having to do with scanline counter resetting.
- 07:2507:25, 2 April 2024 diff hist +353 MMC5 →PPU Data Substitution Enable ($2001 = PPUMASK): Added info about scanline counter.
30 March 2024
- 04:2804:28, 30 March 2024 diff hist +251 MMC5 →Internal extended RAM mode ($5104): Improved connection between PPU address and CPU address for extended RAM data.
29 March 2024
- 13:0513:05, 29 March 2024 diff hist +7 m MMC5 →Vertical Split Mode ($5200)
- 12:5912:59, 29 March 2024 diff hist +849 MMC5 →Vertical Split Mode ($5200): Improved description, fixed problems where I was saying that the MMC5 substitutes pattern data.
27 March 2024
- 03:4503:45, 27 March 2024 diff hist +89 m MMC5 →MMC5A
- 03:3703:37, 27 March 2024 diff hist +429 MMC5 →MMC5A Registers: Corrected errors related to register $5207.
- 00:3200:32, 27 March 2024 diff hist +7 m MMC5 →Nametable mapping ($5105)
- 00:1900:19, 27 March 2024 diff hist +759 MMC5 →Internal extended RAM mode ($5104): Updated description detailing what happens when assigning ExRAM as nametable when extended attributes are enabled.
26 March 2024
- 21:5821:58, 26 March 2024 diff hist +71 MMC5 →Scanline IRQ Status ($5204, read/write): Pin 92 low disables scanline IRQs.
- 21:5421:54, 26 March 2024 diff hist +355 MMC5 →8x16 PPU Sequence Monitoring Enable ($2001 = PPUMASK)
- 21:3521:35, 26 March 2024 diff hist +319 MMC5 →NES internal state monitoring: Corresponding update to description of $2001. I need to check if scanline IRQs get disabled this way as well.
- 21:2421:24, 26 March 2024 diff hist +135 MMC5 →Internal extended RAM mode ($5104): Added PPUMASK info for extended attribute mode.
- 21:2121:21, 26 March 2024 diff hist +101 MMC5 →Vertical Split Mode ($5200): I found that vertical split mode is disabled by PPUMASK monitoring, similar as 8x16 sprite mode.
- 02:2002:20, 26 March 2024 diff hist +115 MMC5 →Vertical Split Mode ($5200): More details, things that automatically disable split mode.
- 02:1402:14, 26 March 2024 diff hist +40 MMC5 →Vertical Split Mode ($5200): Pin 92 low disables split mode.
- 01:5301:53, 26 March 2024 diff hist +9 m MMC5 →Internal extended RAM mode ($5104)
- 01:5301:53, 26 March 2024 diff hist +346 MMC5 →Internal extended RAM mode ($5104): I must have goofed something up before because I absolutely am not getting nametable data to work in mode %11. Tested and added split mode info.
25 March 2024
- 22:1122:11, 25 March 2024 diff hist +474 m MMC5 →Vertical Split Mode ($5200): Additional cleanup.
- 21:0521:05, 25 March 2024 diff hist +411 MMC5 →Vertical Split Mode ($5200): Clarifications as I am reading and remembering how this works. No new information in this edit.
- 19:5419:54, 25 March 2024 diff hist +130 MMC5 →Fill-mode color ($5107): Fill mode color vs. pin 92 low when using extended attributes with fill mode.
- 19:4619:46, 25 March 2024 diff hist −278 MMC5 →Configuration: removed incorrect statements that were caused by a test setup issue. My test waited for in-frame before doing these writes, so the test itself got disabled with pin 92 low.
- 19:1219:12, 25 March 2024 diff hist +13 MMC5 →Internal extended RAM mode ($5104): additional note clarifying that extended ram writes via ppudata does not become available when pin 92 is driven low. I.e. pin 92 low is not just pretending to be in a different mode.
- 19:0619:06, 25 March 2024 diff hist +84 MMC5 →Internal extended RAM mode ($5104): pin 92 low prevents write access to $5C00
- 08:3508:35, 25 March 2024 diff hist +320 MMC5 →Fill-mode color ($5107): added more fill mode info.
- 04:1804:18, 25 March 2024 diff hist −4 m Talk:MMC5 →List of Mysteries: Pin 92 is known now.
- 03:2403:24, 25 March 2024 diff hist +201 MMC5 →Internal extended RAM mode ($5104): Writing during v-blank in modes 00,01 is not writing zeros for me. It either doesn’t write or it corrupts it.
- 02:2002:20, 25 March 2024 diff hist +41 MMC5 →Nametable mapping ($5105)
