Famicom Network System

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Revision as of 05:38, 8 November 2020 by Ben Boldt (talk | contribs) (→‎Known Registers: Added details after revisiting JRA-PAT disassembly.)
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Memory Map

  • $4xA0-$4xCF: RF5C66 Registers
  • $4xD0-$4xDF: RF5A18 Registers
  • $4xE0-$4xEF: Unimplemented (pin not hooked up)
  • $5000-$5FFF: LH5323M1 ROM
  • $6000-$7FFF: Card Bus RAM

Known Registers

Address Read Write Owner Function
$4xA1 Yes Unknown RF5C66 Unknown Function.
  • Bench test observed value $FF with pull-downs.
$4xA2 Yes Unknown RF5C66 Unknown Function.
  • Bench test observed value $20 with pull-downs, $2C with pull-ups.
  • JRA-PAT:
    • Reads this register with a BIT op-code right before CLI op-code.
    • Reads this register and makes a decision based on D7.
  • Super Mario Club reads this register with BIT op-code.
$4xA3 No Yes RF5C66 Unknown Function.
  • Bench test found open bus when reading this register.
  • JRA-PAT writes $2F to this register and appears to keep a RAM copy at $15.
  • Super Mario Club writes $2F to this register and appears to keep a RAM copy at $15.
$4xA5 Yes Unknown RF5C66 Unknown Function.
  • Bench test observed value $00 with pull-downs, $78 with pull-ups.
$4xA6 Yes Yes RF5C66 Unknown Function.
  • Bench test observed different value each read.
  • JRA-PAT writes $20 to this register.
  • Super Mario Club writes $F8 to this register.
$4xA7 Yes Yes RF5C66 Unknown Function.
  • Bench test observed different value each read.
  • JRA-PAT writes $25 to this register.
  • Super Mario Club writes $24 to this register.
$4xA8 No Yes RF5C66 Unknown Function.
  • Bench test found open bus when reading this register.
  • JRA-PAT:
    • Writes $00 to this register.
    • Writes $00 again later, potentially connected to RAM $4F.
    • Later, right after having written $25 to $40A7 and $20 to $40A6, writes $02 to this register.
    • Has these various sequences hard-coded:
      • $25->$40A7, $20->$40A6, $02->$40A8
      • $1C->$40A7, $10->$40A6, $02->$40A8
      • $03->$40A7, $19->$40A6, $02->$40A8
      • $06->$40A7, $F1->$40A6, $02->$40A8
  • Super Mario Club:
    • Writes $00 to this register.
    • Later, right after having written $24 to $40A7 and $F8 to $40A6, writes $02 to this register.
$4xA9 Yes Unknown RF5C66 Unknown Function.
  • Bench test observed value $00 with pull-ups.
$4xAA Yes Unknown RF5C66 Unknown Function.
  • Bench test observed value $00 with pull-ups.
$4xAB No Yes RF5C66 Unknown Function.
  • Bench test found open bus when reading this register.
  • JRA-PAT writes $00 to this register.
  • Super Mario Club writes $00 to this register.
$40AC Yes Unknown RF5C66 Unknown Function.
  • Bench test:
    • Observed $00 with pull-downs and $FF with pull-ups (totally open bus).
    • Reading this register prevents timed toggle on RF5C66-69 (see notes in pinout).
  • JRA-PAT reads this register with a BIT op-code and throws away the result.
  • Super Mario Club reads this register with a BIT op-code.
$4xAD Yes Yes RF5C66 Unknown Function.
  • Bench test observed $00 with pull-downs, $7F with pull-ups.
  • JRA-PAT writes $00 to this register.
  • Super Mario Club writes $80 to this register.
$4xAE No Yes RF5C66 Unknown Function.
  • Bench test found open bus when reading this register.
  • JRA-PAT:
    • Writes $00 to this register.
    • Later writes $01 to this register.
  • Super Mario Club:
    • Writes $00 to this register.
    • Later writes $01 to this register.
$4xB0 Unknown Unknown RF5C66 Unknown Function.
  • Bench test found open bus when reading this register.
  • Super Mario Club:
    • Stores X to this register after incrementing X (observed value $20).
    • Reads this register and throws away the value read.
$4xB1 Yes Yes RF5C66 Unknown Function.
  • Bench test observed value $FF with pull-downs.
  • JRA-PAT:
    • Writes $F7 to this register and appears to keep a RAM copy at $17.
    • Later writes the value from $17, ORed with #$08. (Bit 3 being set to 1.)
    • Also writes the value from $17, ANDed with #$F7. (Bit 3 being set to 0.)
  • Super Mario Club:
    • Writes $F7 to this register and appears to keep a RAM copy at $17.
    • Later writes the value from $17, ORed with #$08. (Bit 3 being set to 1.)
$4xC0 Yes Yes RF5C66 Unknown Function.
  • Bench test observed value $00 with pull-downs, $70 with pull-ups.
  • JRA-PAT:
    • Reads this register, waits for D7 = 1 at initialization.
    • Writes to this register from what appears to be a RAM copy at $18 ORed with #$01.
    • Also writes from $18 ANDed with #$FE.
  • Super Mario Club:
    • Reads this register, waits for D7 = 1 at initialization.
    • Writes $00 to this register and appears to keep a RAM copy at $18.
    • Later writes the value from $18, ANDed with #$FB. (Bit 2 being set to 0.)
    • Reads this register and makes a decision using D7.
$40D0 Yes Yes RF5A18 Unknown Function.
  • Super Mario Club:
    • Writes an unknown value to this register.
    • Reads this register and stores at $701.
$40D1 Yes Yes RF5A18 Unknown Function.
  • Super Mario Club:
    • Writes an unknown value to this register.
    • Reads this register and stores at $702.
$40D2 Yes Yes RF5A18 Unknown Function.
  • Super Mario Club:
    • Writes an unknown value to this register.
    • Reads this register and stores at $703.
$4xD3 Yes Yes RF5A18 Unknown Function.
  • JRA-PAT writes $FF to this register and appears to keep a RAM copy at $19.
  • Super Mario Club:
    • Writes $FF to this register and appears to keep a RAM copy at $19.
    • Does a BIT operation on this register and makes decisions based on D7 and D6.
    • Also writes value $BF to this register, not in connection with $19.
$4xD4 Unknown Yes RF5A18 Unknown Function.
  • JRA-PAT writes $FF to this register and appears to keep a RAM copy at $1A.
  • Super Mario Club writes $FF to this register and appears to keep a RAM copy at $1A.

Pinouts

                                                   _____
                                                  /     \
                                       CPU A0 -> / 1 100 \ -- +5Vcc
                                      CPU A1 -> / 2    99 \ -- n/c
                                     CPU A2 -> / 3      98 \ <> CPU D0
                                    CPU A3 -> / 4        97 \ <> CPU D1
                                   CPU A4 -> / 5          96 \ <> CPU D2
                                  CPU A5 -> / 6            95 \ <> CPU D3
                                 CPU A6 -> / 7              94 \ <> CPU D4
                                CPU A7 -> / 8                93 \ <> CPU D5
                              CPU A12 -> / 9                  92 \ <> CPU D6
                             CPU A13 -> / 10                   91 \ <> CPU D7
                            CPU A14 -> / 11                     90 \ -- GND
                           /ROMSEL -> / 12                       89 \ <> Card D0
                          CPU R/W -> / 13                         88 \ <> Card D1
                              M2 -> / 14                           87 \ <> Card D2
      P6-1 Lid Switch, Card R/W <- / 15                             86 \ <> Card D3
      (20k resistor to 5Vcc) ? -> / 16                               85 \ <> Card D4
                         /IRQ <- / 17                                 84 \ <> Card D5
                       +5Vcc -- / 18                                   83 \ <> Card D6
                        n/c -- / 19                                     82 \ <> Card D7
          21.47727MHz Xtal -- / 20                                       81 \ -- +5Vcc
                     Xtal -- / 21                                            \
                     n/c -- / 22                                     O       /
                    GND -- / 23                                          80 / -- n/c
    (n/c) Xtal Osc Out <- / 24                                          79 / -> Exp P3-2
                  n/c -- / 25                                          78 / <- Exp P3-3
 P4-24, P2-38, CIC-7 <- / 26             Nintendo RF5C66              77 / -> Exp P3-4
                n/c -- / 27      Package QFP-100, 0.65mm pitch       76 / -> Exp P3-5
           (n/c) ? <- / 28                                          75 / -> Exp P3-6
 CIC-11 w/ filter -> / 29             Memory Controller            74 / <- Exp P3-7
          CIC-12 <- / 30                                          73 / <- Exp P3-8
                   /       O                                     72 / <- Exp P3-9
                   \                                            71 / <- Exp P3-11
          CIC-10 -> \ 31                                       70 / -- GND
           CIC-15 -> \ 32                                     69 / -> 5A18-49
  5A18-27, 5C66-68 -> \ 33                                   68 / -> 5A18-27, 5C66-33   Orientation:
CHR RAM /CE (input) -> \ 34                                 67 / <- Exp P3-12           --------------------
        Card RAM +CE <- \ 35                               66 / <- Exp P3-13                80         51
              (n/c) ? <- \ 36                             65 / <- Exp P3-14                  |         |
               (n/c) ? <- \ 37                           64 / <- Exp P3-15                  .-----------.
            CHR RAM /CE <- \ 38                         63 / <- ? (n/c)                  81-|O Nintendo |-50
                     GND -- \ 39                       62 / <- Modem P4-31                  |  RF5C66   |
   W-RAM /CE ($6000-7FFF) <- \ 40                     61 / <- Modem P4-32               100-|  GCD 4R  O|-31
  (n/c) ? /CE ($4xE0-4xEF) <- \ 41                   60 / <- Modem P4-29                    \-----------'
   5A18-85 /CE ($4xD0-4xDF) <- \ 42                 59 / -- +5Vcc                            |         |
                     (GND) ? -> \ 43               58 / -- n/c                              01         30
                      (GND) ? -> \ 44             57 / -> 5323-37
                       (GND) ? -> \ 45           56 / -> 5323-41              Legend:
                        (GND) ? -> \ 46         55 / -> 5323-7                ------------------------------
                       CIRAM A10 <- \ 47       54 / -> 5323-8                 --[RF5C66]-- Power
                          PPU A11 -> \ 48     53 / -> 5323-9                  ->[RF5C66]<- RF5C66 input
                           PPU A10 -> \ 49   52 / -> 5323-13                  <-[RF5C66]-> RF5C66 output
          LH5323M1 /CE ($5000-5FFF) <- \ 50 51 / -- n/c                       <>[RF5C66]<> Bidirectional
                                        \     /                               ??[RF5C66]?? Unknown
                                         \   /                                    f      Famicom connection
                                          \ /                                     r      ROM chip connection
                                           V                                      R      RAM chip connection
Notes:
- +5Vcc pins 18, 59, 81, 100 are all connected together internally.
- GND pins 23, 29, 70, 90 are all connected together internally.
- 43, 44, 45, 46 are GND on the PCB, but have internal protection diodes from GND, suggesting they are logic pins.
- 24, 28, 36, 37, 41, 63 are n/c on the PCB, but have protection diodes from GND, suggesting they may have a function.
- Pins 41 and 42 ranges shown are duplicated at $Cxxx (i.e. ignores /ROMSEL).
- Pins 45-46, when pulled high, causes oscillation on pin 56.
- Pin 29 is a /reset.  It sets pins 52-57 low when this pin is low, and possibly lots of other things.
- Pin 16 Pull-up of 20k to 5V is also required in order to avoid triggering reset.
- Pin 16 seems to be related to pin 29.  With pin 29 floating and pin 16 pulled high at power on, the chip runs for 5 seconds, then enters reset.
- Tested 10k instead of 20k (per original PCB) on pin 16, found no difference in time or function.
- Pin 69 has a high pulse of 11.9085 usec at any time that register $4xAC has not been read for 12.4892 seconds.
  - Each additional 12.4892 seconds generates another pulse.
  - It has very repeatable precision, at least 6 figures on each.
  - It is not synchronized to M2 or any other inputs.
  - Note that 12.4892 sec * 21.47727 MHz = 2^28, with an error of 0.075%. (Nominal would be 12.4986 sec.)
  - Note that 11.9085 usec * 21.47727 MHz = 2^8, with an error of 0.093%. (Nominal would be 11.9196 usec.)
- Pins 52-56 drive the address pins of the LH5323M1.  (See notes below the LH5323M1 pinout.)



                                                   _____
                                                  /     \
                                    U6 RAM A0 <- / 1 100 \ -- GND
                                   U6 RAM A1 <- / 2    99 \ <> U6 RAM D0
                                  U6 RAM A2 <- / 3      98 \ <> U6 RAM D1
                                 U6 RAM A3 <- / 4        97 \ <> U6 RAM D2
                                U6 RAM A4 <- / 5          96 \ <> U6 RAM D3
                               U6 RAM A5 <- / 6            95 \ <> U6 RAM D4
                              U6 RAM A6 <- / 7              94 \ <> U6 RAM D5
                             U6 RAM A7 <- / 8                93 \ <> U6 RAM D6
                                +5Vcc -- / 9                  92 \ <> U6 RAM D7
                           U6 RAM A8 <- / 10                   91 \ -- +5Vcc
                          U6 RAM A9 <- / 11                     90 \ -> P4-8
                        U6 RAM A10 <- / 12                       89 \ <- P4-6
                       U6 RAM A11 <- / 13                         88 \ <- CPU A2
                      U6 RAM A12 <- / 14                           87 \ <- CPU A1
                        (n/c) ? <- / 15                             86 \ <- CPU A0
                       (n/c) ? <- / 16                               85 \ <- /CE (5C66-42)
                      (n/c) ? <- / 17                                 84 \ <- P6-1 Lid Switch, Card R/W
                         GND -- / 18                                   83 \ <- M2
                    (n/c) ? <- / 19                                     82 \ <> Card D7
                U6 RAM /WR <- / 20                                       81 \ <> Card D6
               U6 RAM /CE <- / 21                                            \
                 (n/c) ? <- / 22                                     O       /
  <UNKNOWN>, test point <- / 23                                          80 / <> Card D5
               (GND) ? -> / 24                                          79 / <> Card D4
              (GND) ? -> / 25                                          78 / -- GND
             (GND) ? -> / 26             Nintendo RF5A18              77 / <> Card D3
   5C66-33, 5C66-68 -> / 27      Package QFP-100, 0.65mm pitch       76 / <> Card D2
  <UNKNOWN> 10k up -> / 28                                          75 / <> Card D1
 <UNKNOWN> 10k up -> / 29              Modem Controller            74 / <> Card D0
             n/c -- / 30                                          73 / <- Modem P4-22
                   /       O                                     72 / <- Modem P4-17
                   \                                            71 / <- Modem P4-18
           +5Vcc -- \ 31                                       70 / <- Modem P4-16
       Modem P4-7 -> \ 32                                     69 / <- Modem P4-13
       Modem P4-14 -> \ 33                                   68 / -> Modem P4-20        Orientation:
        Modem P4-10 <- \ 34                                 67 / -> Exp P3-19           --------------------
          Modem P4-9 <- \ 35                               66 / <- Exp P3-18                80         51
          Modem P4-11 <- \ 36                             65 / <- Exp P3-17                  |         |
               (n/c) ? <- \ 37                           64 / -- +5Vcc                      .-----------.
             Modem P4-5 <- \ 38                         63 / -> Modem P4-19              81-|O  RF5A18  |-50
              Modem P4-3 <- \ 39                       62 / -> Modem P4-21                  |  Nintendo |
                  (n/c) ? <- \ 40                     61 / -> Modem P4-30               100-|  GCD 8C  O|-31
                   (n/c) ? <- \ 41                   60 / -> Modem P4-27                    \-----------'
                  Exp P3-16 <- \ 42                 59 / -> ? (n/c)                          |         |
                         GND -- \ 43               58 / -> Green LED, active low            01         30
              19.6608MHz Xtal -- \ 44             57 / -> Red LED, active low
                    1k to Xtal -- \ 45           56 / -> Modem P4-2           Legend:
                            GND -- \ 46         55 / <- Modem P4-23           ------------------------------
                       (+5Vcc) ? -> \ 47       54 / <- Modem P4-28            --[RF5A18]-- Power
                        (+5Vcc) ? -> \ 48     53 / <- Modem 4-25              ->[RF5A18]<- RF5A18 input
                           5C66-69 -> \ 49   52 / <- Switch SW1-4             <-[RF5A18]-> RF5A18 output
                                n/c -- \ 50 51 / <- Switch SW1-2              <>[RF5A18]<> Bidirectional
                                        \     /                               ??[RF5A18]?? Unknown
                                         \   /                                    f      Famicom connection
                                          \ /                                     r      ROM chip connection
                                           V                                      R      RAM chip connection
Notes:
- +5Vcc pins 9, 31, 64, 91 are all connected together internally.
- GND pins 18, 43, 46, 78, 100 are all connected together internally.
- 24, 25, 26 are GND on the PCB, but have internal protection diodes from GND, suggesting they are logic pins.
- 47, 48 are +5Vcc on the PCB, but have internal protection diodes to +5Vcc, suggesting they are logic pins.
- 15, 16, 17, 19, 22, 37, 40, 41, 59 are n/c on the PCB, but have protection diodes from GND, suggesting they may have a function.



                              _____  Note: Flat spot does not correspond to pin 1.
                             /     \
                     n/c -- / 12 11 \ -- n/c
          (A12) 5C66-52 -> / 13   10 \ -- n/c
                CPU D0 <> / 14      9 \ <- 5C66-53 (A13)
               CPU D1 <> / 15        8 \ <- 5C66-54 (A14)
              CPU D2 <> / 16          7 \ <- 5C66-55 (A15)
                GND -- / 17            6 \ -- GND
            CPU D3 <> / 18              5 \ <- CPU A0
           CPU D4 <> / 19                4 \ -- n/c
          CPU D5 <> / 20                  3 \ <- CPU A1
         CPU D6 <> / 21                    2 \ <- CPU A2
        CPU D7 <> / 22  Nintendo LH5323M1   1 \ -- n/c
                 /        Package QFP-44       \
                 \         0.8mm pitch         /
           n/c -- \ 23                     44 / <- CPU A3
            n/c -- \ 24    Seems like a   43 / <- CPU A8
       (GND) /OE -- \ 25     ROM Chip    42 / <- CPU A11
           CPU A6 -> \ 26               41 / <- 5C66-56 (A16)
     (5C66-50) /CE -> \ 27             40 / -- n/c
                GND -- \ 28           39 / -- n/c
              CPU A7 -> \ 29         38 / -- +5Vcc
               CPU A5 -> \ 30       37 / <- 5C66-57 (A17)
                   n/c -- \ 31     36 / <- CPU A10
                    n/c -- \ 32   35 / -- n/c
                  CPU A4 -> \ 33 34 / <- CPU A9
                             \     /
                              \   /
                               \ /
                                V
Notes:
- 6 & 28 are connected together internally.
- 17 has no measurable connection to 6 & 28.
- All logic pins have protection diode from pin 17, suggesting this is the true GND.
- Pin 25 also appears as a logic pin with respect to pin 17.
- When pins 25 and 27 are both driven low, the data bus becomes an output.  Otherwise it is hi-z.  27 could either be a /CE or W/R.
- Pins 13, 9, 8, 7, 41, 37 are presumably akin to PRG A12 - A17, driven by the 5C66.
  - Strangely, the value of these pins increments each M2 falling edge when the CPU is in range $5000-5FFF.
  - At reset, these pins are all 0 from the 5C66.
  - LH5323M1 ROM chip will see CPU A0-A11 ($xx000 from CPU), ORed with $00xxx supplied from 5C66.
  - Example: CPU reads from $5000 repeatedly.
    - LH5323M1 ROM chip sees $00000, $01000, $02000, $03000, $04000 ... $1F000, (>>rollover>>) $00000.
    - Unknown how but apparently possible to get into range $20000-3FFFF since the ROM has unique data there.



                           _______   _______
                           |      \_/      |
                Card-37 ?? | 1          18 | -- +5Vcc
                Card-36 ?? | 2  O       17 | -- n/c
                    n/c -- | 3   8633   16 | -- n/c
                    n/c -- | 4          15 | -> 5C66-32
                    n/c -- | 5    CIC   14 | -- n/c
                    n/c -- | 6   Host   13 | -- n/c
P4-24, Card-38, 5C66-26 -> | 7          12 | <- 5C66-30
                Card-35 ?? | 8    U8    11 | -> 5C66-29 (/Reset)
                    GND -- | 9          10 | -> 5C66-31
                           |_______________|

- Seems similar to F411A from Super NES.



                   _______   _______
                   |      \_/      |
           n/c? -- | 1          28 | -- +5Vcc
        PPU A12 -> | 2  O       27 | <- PPU /WR
         PPU A7 -> | 3          26 | <- +CE: U3=RF5C66 34/38, U4=PPU /A13
         PPU A6 -> | 4          25 | <- PPU A8
         PPU A5 -> | 5  LH5268  24 | <- PPU A9
         PPU A4 -> | 6    CHR   23 | <- PPU A11
         PPU A3 -> | 7    RAM   22 | <- /OE: PPU /RD
         PPU A2 -> | 8   U3/U4  21 | <- PPU A10
         PPU A1 -> | 9          20 | <- /CE: U3=PPU A13, U4=RF5C66 34/38
         PPU A0 -> | 10         19 | <> PPU D7
         PPU D0 <> | 11         18 | <> PPU D6
         PPU D1 <> | 12         17 | <> PPU D5
         PPU D2 <> | 13         16 | <> PPU D4
            GND -- | 14         15 | <> PPU D3
                   |_______________|



                   _______   _______
                   |      \_/      |
           n/c? -- | 1          28 | -- +5Vcc
        CPU A12 -> | 2  O       27 | <- /WR: Card R/W (P6-2 Lid Switch)
         CPU A7 -> | 3          26 | <- +CE: Card RAM +CE
         CPU A6 -> | 4          25 | <- CPU A8
         CPU A5 -> | 5  LH5268  24 | <- CPU A9
         CPU A4 -> | 6  W-RAM   23 | <- CPU A11
         CPU A3 -> | 7          22 | <- /OE: GND
         CPU A2 -> | 8    U5    21 | <- Card A10
         CPU A1 -> | 9          20 | <- /CE: W-RAM /CE
         CPU A0 -> | 10         19 | <> Card D7
        Card D0 <> | 11         18 | <> Card D6
        Card D1 <> | 12         17 | <> Card D5
        Card D2 <> | 13         16 | <> Card D4
            GND -- | 14         15 | <> Card D3
                   |_______________|



                   _______   _______
                   |      \_/      |
           n/c? -- | 1          28 | -- +5Vcc
  Modem RAM A12 -> | 2  O       27 | <- /WR: Modem RAM /WR
   Modem RAM A7 -> | 3          26 | <- +CE: +5Vcc
   Modem RAM A6 -> | 4          25 | <- Modem RAM A8
   Modem RAM A5 -> | 5  LH5268  24 | <- Modem RAM A9
   Modem RAM A4 -> | 6   Modem  23 | <- Modem RAM A11
   Modem RAM A3 -> | 7    RAM   22 | <- /OE: GND
   Modem RAM A2 -> | 8    U6    21 | <- Modem A10
   Modem RAM A1 -> | 9          20 | <- /CE: Modem RAM /CE
   Modem RAM A0 -> | 10         19 | <> Modem RAM D7
   Modem RAM D0 <> | 11         18 | <> Modem RAM D6
   Modem RAM D1 <> | 12         17 | <> Modem RAM D5
   Modem RAM D2 <> | 13         16 | <> Modem RAM D4
            GND -- | 14         15 | <> Modem RAM D3
                   |_______________|



P4: Modem Edge Connector
        _________
        |       |
  +5Vcc | 1  19 | 5A18-63
5A18-56 | 2  20 | 5A18-68
5A18-39 | 3  21 | 5A18-62
    GND | 4  22 | 5A18-73
5A18-38 | 5  23 | 5A18-55
5A18-89 | 6  24 | 5C66-26, Card-38, 8633 CIC-7
5A18-32 | 7  25 | 5A18-53
5A18-90 | 8  26 | GND
5A18-35 | 9  27 | 5A18-60
5A18-34 | 10 28 | 5A18-54
5A18-36 | 11 29 | 5C66-60
  +5Vcc | 12 30 | 5A18-61
5A18-69 | 13 31 | 5C66-62
5A18-33 | 14 32 | 5C66-61
  +5Vcc | 15 33 | Audio from 2A03
5A18-70 | 16 34 | Audio to RF
5A18-72 | 17 35 | GND
5A18-71 | 18 36 | GND
        |_______| 



P2: Game Card Connector

 1 | +5Vcc
 2 | +5Vcc
 3 | n/c in host
 4 | n/c in JRA-PAT, Host has 10k pull-up only.
 5 | Card D0
 6 | Card D1
 7 | Card D2
 8 | Card D3
 9 | Card D4
10 | Card D5
11 | Card D6
12 | Card D7
13 | Card R/W (P6-2 Lid Switch)
14 | M2
15 | /ROMSEL
16 | CPU A0
17 | CPU A1
18 | CPU A2
19 | CPU A3
20 | CPU A4
21 | CPU A5
   |
   |
22 | CPU A6
23 | CPU A7
24 | CPU A8
25 | CPU A9
26 | CPU A10
27 | CPU A11
28 | CPU A12
29 | CPU A13
30 | CPU A14
31 | n/c in JRA-PAT, Host has 10k pull-up only.
32 | n/c in JRA-PAT, Host has 10k pull-up only.
33 | connected to CIC slave chip in JRA-PAT, n/c in host
34 | n/c in host
35 | 8633 CIC-8
36 | 8633 CIC-2
37 | 8633 CIC-1
38 | P4-24, 8633 CIC-7, 5C66-26
39 | n/c in JRA-PAT, Host has 10k pull-up only.
40 | Card RAM +CE (n/c in JRA-PAT)
41 | GND
42 | GND



P3: Expansion Connector
        _________
        |       |
   /IRQ | 1  20 | +5Vcc
5C66-79 | 2  19 | 5A18-67
5C66-78 | 3  18 | 5A18-66
5C66-77 | 4  17 | 5A18-65
5C66-76 | 5  16 | 5A18-42
5C66-75 | 6  15 | 5C66-64
        |       |
5C66-74 | 7  14 | 5C66-65
5C66-73 | 8  13 | 5C66-66
5C66-72 | 9  12 | 5C66-67
    GND | 10 11 | 5C66-71
        |_______|

See Also

Retrieved from "https://www.nesdev.org/w/index.php?title=Famicom_Network_System&oldid=2643"