CPU variants
Beyond the well-studied 2A03G, we know of the following CPU revisions, both made by Ricoh and other manufacturers:
| RP2A03 | M2 duty cycle is 17/24 instead of 15/24 [1]. Lacks tonal noise mode. APU Frame Counter not restarted on reset. Has broken and disabled programmable interval timer on-die. Pin 30 connects to nothing. Other differences?
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| RP2A03E | Pin 30 may connect to 6502 /RDY input.
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| RP2A03G | Reference model. Pin 30 enables a CPU test mode. Later runs introduced a DMC DMA bug [2].
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| RP2A03H | No known differences from late RP2A03G.
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| RP2A04 | Not actually a CPU at all, just a jumper in a 40-pin PDIP
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| RP2A07 | Input clock divider is 16. M2 duty cycle is 19/32 [3]. Changes to noise, DPCM, frame timer tables. Fixed DPCM RDY address bus glitches. Pin 30 connects to 6502 /RDY input.
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| RP2A07A | no known differences relative to 2A07letterless
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| MG-N-501 |  Unlike early UA6527, DMC works
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| MG-P-501 | Micro Genius-made clone. Die has the same (UMC) © Ⓜ B6167F marking as a UA6527P.
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| UA6527 | UMC-made clone of 2A03G. Has swapped pulse channel duty cycles.
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| UA6527P | UMC-made clone of 2A03G for compatibility with NTSC software in PAL countries. input clock divider is 15. Otherwise believed same as 6527.
Two revisions exist: before mid-1990 (which has UMC logo on left) and after-mid-1990 (which has UMC logo on top). It is said that old UMC CPU has broken DMC reader function [4]. Additionally it has input clock divider equals to 16 in contrary to the 15 present in newer one, that would explain why some games work differently (for example: CodeMasters' titles) One revision has (UMC) © Ⓜ B6167F 1989 09 on the die.
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| UA6540 | UMC-made clone of 2A07 [5]. Has swapped pulse duty cycles.
Subsequent research implies this is identical to the early 6527P - NTSC tuning tables, ÷16 CPU divider. [6]
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| UM6557 | Believed to be a 100% duplicate of UA6527, for use in SECAM regions. | ||||||
| UM6561xx-1 | NES-on-a-chip for NTSC. Revisions "xx" F, AF, BF, CF known. Earlier revisions (which?) CPU half believed identical to UA6527; later revisions correct pulse channel duties. | ||||||
| UM6561xx-2 | NES-on-a-chip for PAL-B. Revisions "xx" F, AF, BF, CF known. Earlier revisions (which?) CPU half believed identical to UA6527P; later revisions correct pulse channel duties.
F and AF revision pulse wave duty cycles observed to be same as 2A03. AF revision has the late RP2A03G DMC DMA bug, but both DMA bugs when triggered implicitly by a sample ending are delayed by 1 APU cycle (the aborted DMA bug is not delayed when ending a sample explicitly by writing to $4015). AF revision observed to have incorrect ASR #imm ($4B) behavior, but other stable illegal instructions work properly.
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| T1818 | ??-made NES-on-a-chip, NTSC timing. Believed to exist, but evidence currently scant. | ||||||
| T1818P | ??-made NES-on-a-chip[[7]. Requires external 2 KiB RAMs for CPU and PPU. Swapped pulse duty cycles. | ||||||
| TA-03N | ??-made clone of 2A03G. Pin 30 selects input clock divider?
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| TA-03NP | ??-made clone of 2A03G for NTSC compatibility in PAL countries. Input clock divider is 15?
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| TA-03NP1 | ??-made clone of 2A03G for NTSC compatibility in PAL countries. Input clock divider is 15. Fixed DPCM problems?
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| PM03 | Gradiente-made clone of 2A03G. [8]
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| GS870007 | (Goldstar??)-made clone of 2A03 - has functioning decimal mode? [9]
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| KC-6005 | Found in MT777-DX famiclone, behaves exactly like UA6527P
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| 6005B | 
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| 2011 | 
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| “2A03E” | Both with and without USC insignia
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| KP2B03E | 
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If you know of other differences or other revisions, please add them!
