74161

The 74161 (common variants 74LS161, 74HC161) is a 74-series logic 4-bit latch and upwards counter. Several discrete logic mappers use it as a latch.

74161 Pinout

              .--\/--.
     /Clear -o|01  16|-- +5V
      Clock --|02  15|-- CarryOut
         D0 --|03  14|-- Q0
         D1 --|04  13|-- Q1
         D2 --|05  12|-- Q2
         D3 --|06  11|-- Q3
CountEnable --|07  10|-- CarryIn
        Gnd --|08  09|o- /Load
              `------'

Signal descriptions

While /Clear is low, Q is reset to 0.

When CountEnable and CarryIn are both high, a low-to-high transition on Clock increases the value of Q by 1, wrapping from 15 to 0.

CarryOut is high when CarryIn is high and Q is 15.

/Load causes Q to be set to the value of D on a low-to-high transition of Clock.

Latch Implementation

74HC161     -- NES
-----------------------
+5V         -- +5V
/Clear      -- +5V
Clock       -- /ROMSEL
/Load       -- CPU R/W
D0-D3       -- CPU D0-D3 (or any arbitrary selection)
Q0-Q3       -- (PRG or CHR chip high address lines)
CountEnable -- GND
CarryIn     -- GND
GND         -- GND

In most discrete logic mappers, the 74161 is used as a latch.

• /Clear high, CountEnable low, and CarryIn low.
• /Load is connected to CPU R/W, which goes low in preparation for a write.
• Clock is connected to /ROMSEL, which goes high when the CPU address is $8000 or above (A15) and stable/ready (M2).

Additionally, a 7402 is sometimes used to disable the PRG ROM during writes, preventing bus conflicts.

See: Cartridge connector