CPU power up state
From NESdev Wiki
Jump to navigationJump to search
The following results are from a US (NTSC) NES, original front-loading design, RP2A03G CPU chip, NES-CPU-07 main board revision, manufactured in 1988. The memory values are probably slightly different for each individual NES console. Please note that you should NOT rely on the state of any registers after Power-UP and especially not the stack register and WRAM ($0000-$07FF).
At power-up
- P = $34 (interrupt inhibit set)
- A, X, Y = 0
- S = $FD
- All internal memory ($0000-$07FF) was consistently set to $ff except
- $0008=$F7
- $0009=$EF
- $000a=$DF
- $000f=$BF
- $4017 = $00 (frame irq enabled)
- $4015 = $00 (all channels disabled)
- $4000-$400F = $00 (not sure about $4010-$4013)
- IRQ was first asserted about 1/60 second after power-up, by APU
After reset
- A, X, Y were not affected
- S was decremented by 3 (but nothing was written to the stack)
- The I flag was set (status ORed with $04)
- The internal memory was unchanged
- APU mode in $4017 was unchanged
- APU was silenced ($4015 = 0)