Sunsoft FME-7

The Sunsoft FME-7 represents two mapper ICs which work identically, except that one contains extra sound hardware. The FME-7 is the base memory mapper with no additional sound hardware. The Sunsoft 5B is an FME-7 with the addition of extra sound hardware. Both the Sunsoft 5B and FME-7 exist as a 44 pin TQFP. It is emulated as iNES Mapper 069.

In Europe, boards using the FME-7 were labeled as JSROM and JLROM. The FME-7 mapper was used in only one game released in the US, Batman: Return of the Joker.

Many Japanese releases by Sunsoft used the FME-7: Gimmick!, Hebereke, Gremlins 2 (but not in the US version), Barcode World, and others.

Overview

Manufacturer: Sunsoft
PRG ROM Size: Up to 256 KiB on 5B; Up to 512 KiB on FME-7; at least 256 KiB on 5A but unknown.
PRG ROM Bank Size: 8 KiB
PRG RAM: Up to 8 KiB, and possibly more
CHR capacity: 256 KiB
CHR Bank Size: 1 KiB
Nametable mirroring: Controlled by Mapper: H, V, 1scA, 1scB
Subject to bus conflicts: No

Banks

CPU $6000-$7FFF: 8 KB Bankable PRG ROM or PRG RAM
CPU $8000-$9FFF: 8 KB Bankable PRG ROM
CPU $A000-$BFFF: 8 KB Bankable PRG ROM
CPU $C000-$DFFF: 8 KB Bankable PRG ROM
CPU $E000-$FFFF: 8 KB PRG ROM, fixed to the last bank of ROM
PPU $0000-$03FF: 1 KB Bankable CHR ROM
PPU $0400-$07FF: 1 KB Bankable CHR ROM
PPU $0800-$0BFF: 1 KB Bankable CHR ROM
PPU $0C00-$0FFF: 1 KB Bankable CHR ROM
PPU $1000-$13FF: 1 KB Bankable CHR ROM
PPU $1400-$17FF: 1 KB Bankable CHR ROM
PPU $1800-$1BFF: 1 KB Bankable CHR ROM
PPU $1C00-$1FFF: 1 KB Bankable CHR ROM

Registers

Configuration of the FME-7 is accomplished by first writing the command number to the Command Register at $8000-9FFF, then writing the command's parameter byte to the Parameter Register at $A000-BFFF.

There are 16 commands:

$0-7 control CHR banking
$8-B control PRG banking
$C controls nametable mirroring
$D-F controls IRQ

On the 5B variant, there are two additional registers at $C000-DFFF and $E000-FFFF that control the audio expansion. See: Sunsoft 5B audio

Command Register ($8000-$9FFF)

7  bit  0
---- ----
.... CCCC
     ||||
     ++++- The command number to invoke when writing to the Parameter Register

Parameter Register ($A000-$BFFF)

7  bit  0
---- ----
PPPP PPPP
|||| ||||
++++-++++- The parameter to use for this command. Writing to this register invokes the command in the Command Register.

Commands

CHR Bank 0-7 ($0-7)

7  bit  0
---- ----
BBBB BBBB
|||| ||||
++++-++++- The bank number to select for the specified bank.

Bank $0 - PPU $0000-$03FF
Bank $1 - PPU $0400-$07FF
Bank $2 - PPU $0800-$0BFF
Bank $3 - PPU $0C00-$0FFF
Bank $4 - PPU $1000-$13FF
Bank $5 - PPU $1400-$17FF
Bank $6 - PPU $1800-$1BFF
Bank $7 - PPU $1C00-$1FFF

PRG Bank 0 ($8)

7  bit  0
---- ----
ER.B BBBB
|| | ||||
|| +-++++- The bank number to select at CPU $6000 - $7FFF
|+------- RAM / ROM Select Bit
|         0 = PRG ROM
|         1 = PRG RAM
+-------- RAM Enable Bit (6264 +CE line)
          0 = PRG RAM Disabled
          1 = PRG RAM Enabled

It is very likely that a cartridge could be modified to support banking up to 256 KiB of PRG-RAM here. However, no game was ever released with more than 8KiB and this is currently untested. At least one version of the FME-7 mapper for the PowerPak supports 32 KiB.

An open bus is produced if the RAM / ROM Select Bit is 1 (RAM selected), but the RAM Enable Bit is 0 (disabled). This is a limited form of WRAM write protection on power-up.

There is a tentative report that not all games honor some or any of the bits in this register. Corroboration is needed before any action is taken.

PRG Bank 1-3 ($9-B)

7  bit  0
---- ----
...B BBBB
   | ||||
   +-++++- The bank number to select for the specified bank.

Bank $9 - CPU $8000-$9FFF
Bank $A - CPU $A000-$BFFF
Bank $B - CPU $C000-$DFFF

Name Table Mirroring ($C)

These values are the same as MMC1 mirroring modes with the MSB inverted.

7  bit  0
---- ----
.... ..MM
       ||
       ++- Mirroring Mode
            0 = Vertical
            1 = Horizontal
            2 = One Screen Mirroring from $2000 ("1ScA")
            3 = One Screen Mirroring from $2400 ("1ScB")

IRQ Control ($D)

7  bit  0
---- ----
C... ...T
|       |
|       +- IRQ Enable
|           0 = Do not generate IRQs
|           1 = Do generate IRQs
+-------- IRQ Counter Enable
            0 = Disable Counter Decrement
            1 = Enable Counter Decrement

All writes to this register acknowledge an active IRQ.^[1] It is not yet known what will happen if this register is written to at the same time as an IRQ would have been generated.

IRQ Counter Low Byte ($E)

7  bit  0
---- ----
LLLL LLLL
|||| ||||
++++-++++- The low eight bits of the IRQ counter. Note that setting this register directly sets the lower eight bits of the counter.

IRQ Counter High Byte ($F)

7  bit  0
---- ----
HHHH HHHH
|||| ||||
++++-++++- The high eight bits of the IRQ counter. Note that setting this register directly sets the upper eight bits of the counter.

IRQ Operation

The IRQ feature of FME-7 is a CPU cycle counting IRQ generator. When enabled the 16-bit IRQ counter is decremented once per CPU cycle. When the IRQ counter is decremented from $0000 to $FFFF an IRQ is generated. The IRQ line is held low until it is acknowledged.

How to Use the IRQ Generator

Set the counter to the desired number of cycles minus one.
Enable the IRQ generator by turning on both the IRQ Enable and IRQ Counter Enable flags of the IRQ Control command.
Within the IRQ handler, write to the IRQ Control command to acknowledge the IRQ.
Optional: Go back to Step 1 for the next IRQ.

↑ Test performed in 2015 by Oliveira using IRQ acknowledge test ROM on NESdev BBS

[1] Test performed in 2015 by Oliveira using IRQ acknowledge test ROM on NESdev BBS

[1]