User contributions for Fiskbit

From NESdev Wiki
Jump to navigationJump to search
Search for contributionsExpandCollapse
⧼contribs-top⧽
⧼contribs-date⧽
(newest | oldest) View ( | ) (20 | 50 | 100 | 250 | 500)

6 February 2023

3 February 2023

1 February 2023

30 January 2023

25 January 2023

23 January 2023

21 January 2023

17 January 2023

15 January 2023

7 January 2023

  • 20:0420:04, 7 January 2023 diff hist +94 m DMASummary section: Notes that failed halts delay to the next *CPU* cycle. Attempts to clarify DMC DMA behavior (failed halts delay to the next CPU cycle).
  • 12:2812:28, 7 January 2023 diff hist +131 DMAAdds a reference to lidnariq's post explaining joypad clocking on RF Famicoms.

6 January 2023

  • 23:3523:35, 6 January 2023 diff hist +39 DMARemoves ambiguous 'happens' wording. Clarifies in the summary what kind of cycle we're talking about (though it's always CPU cycles when absent a descriptor).
  • 17:4517:45, 6 January 2023 diff hist +125 DMAAdds link to BreakingNES analysis of the DMA circuit.
  • 11:0111:01, 6 January 2023 diff hist +34 DMAClarifies that there are two DMA units. Clarifies that the 6502 core itself ignores halts if it's writing.
  • 09:1309:13, 6 January 2023 diff hist +27,606 DMAReplaces DMA article stub with detailed DMA behavior writeup. There are still some edge cases to test and 2A07 behavior to verify, but it's largely complete.

24 December 2022

23 December 2022

20 December 2022

7 December 2022

6 December 2022

2 December 2022

27 November 2022

23 November 2022

22 November 2022

21 November 2022

20 November 2022

19 November 2022

17 November 2022

14 October 2022

  • 00:3600:36, 14 October 2022 diff hist +960 MMC1Moves the shift register explanation, examples, and consecutive writes part of Registers into their own section, organized in a way that should improve clarity. Improves the explanation. Adds reset examples.

13 October 2022

3 October 2022

  • 20:1520:15, 3 October 2022 diff hist +100 FamicomBoxAdds arrows on joypad D3 and D4 (not sure if there was a reason these were missing). Notes at port pinouts that J2 D3 and D4 can be disabled with DIP switch 10. Rephrases $4017R DIP switch note.

27 September 2022

  • 10:3210:32, 27 September 2022 diff hist −159 PPU variantsRemoves the RP2C03G. There is no evidence this chip actually exists. Very few mentions online, possibly stemming from a typo long ago. Happy to add this back if anyone can support its existence at all.

26 September 2022

  • 08:1208:12, 26 September 2022 diff hist −9 CPU variantsConfirmed that later 2A03G's have an additional DMC bug (introduced sometime 1989-1991). (Thanks to Lockster for running dmc_dma_implicit_stop_test on multiple CPUs in the same system.)

22 September 2022

(newest | oldest) View ( | ) (20 | 50 | 100 | 250 | 500)