User contributions for Quietust
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22 September 2021
- 22:3822:38, 22 September 2021 diff hist −105 m Nintendulator not really hosted on SourceForge anymore - the binaries from 0.980 are still there, but I migrated the sources to GitHub years ago
- 21:5221:52, 22 September 2021 diff hist −550 m User:Quietust Wow, my user page is really out of date. Let's fix that, shall we?
16 September 2021
- 13:5213:52, 16 September 2021 diff hist +2 m User talk:Abuse filter No edit summary
- 13:5213:52, 16 September 2021 diff hist +355 m User talk:Abuse filter No edit summary
15 September 2021
- 15:4715:47, 15 September 2021 diff hist +210 User talk:Abuse filter No edit summary
11 September 2021
- 13:3113:31, 11 September 2021 diff hist +210 m User talk:Lidnariq →24-bit hexadecimal integers
- 13:2813:28, 11 September 2021 diff hist +355 User talk:Lidnariq →24-bit hexadecimal integers
3 August 2021
- 20:5620:56, 3 August 2021 diff hist −2 m Talk:MMC5 vertical, not horizontal, but even then the MMC5 doesn't necessarily need it
- 20:5220:52, 3 August 2021 diff hist −217 m Talk:MMC5 No edit summary
- 20:5120:51, 3 August 2021 diff hist +104 Talk:MMC5 These were for smooth VERTICAL scrolling, and we know how it works. What we don't know is why nobody actually USED it that way...
- 20:4420:44, 3 August 2021 diff hist −22 Talk:MMC5 Laser Invasion uses ExRAM as a nametable, and it accesses it solely via $2007
1 July 2021
- 21:2521:25, 1 July 2021 diff hist +7 m Game bugs →General bugs
3 June 2021
- 15:5615:56, 3 June 2021 diff hist −5 m Aladdin deck enhancer pinout "wire wire"
19 May 2021
- 14:2114:21, 19 May 2021 diff hist +1 m UNIF/UNL-DripGame No edit summary current
- 13:4713:47, 19 May 2021 diff hist −6 m UNIF/UNL-DripGame No edit summary
17 May 2021
- 13:3713:37, 17 May 2021 diff hist +1 m File:2a03 map.jpg update URL to https current
6 May 2021
- 15:2915:29, 6 May 2021 diff hist +8 m MMC1 →CHR bank 0 (internal, $A000-$BFFF): fix copy/paste error - only the lowest bit is ignored in 8KB mode
23 April 2021
- 12:5812:58, 23 April 2021 diff hist +658 Talk:CPU addressing modes No edit summary current
14 April 2021
- 15:1315:13, 14 April 2021 diff hist +69 m Emulator tests Clarify why my emulator was used for the "known good" log - kevtris used it when he was writing the test, and its debug output is also reasonably detailed
7 April 2021
- 02:5402:54, 7 April 2021 diff hist +8 m Famicom Network System for completeness, repeat the "$0027 = ~33ms" here
- 02:4602:46, 7 April 2021 diff hist +1 m PPU scrolling →Tile and attribute fetching
- 02:3802:38, 7 April 2021 diff hist +2 m PPU scrolling →Register controls: Also change "=" to "<-" to more clearly express that the values are being transferred (already updated the others above but missed these two)
- 02:3502:35, 7 April 2021 diff hist +128 PPU scrolling →Register controls: Adjust the diagrams for the various writes - order them ABCDEFGH (instead of HGFEDCBA) and mark unused bits. For the H/V updates, label the various bits according to their logical positions rather than their literal locations
26 March 2021
- 18:1318:13, 26 March 2021 diff hist +50 m Colour emphasis explain why they become unplayable current
24 March 2021
- 20:1920:19, 24 March 2021 diff hist +86 m Mapper →Common capabilities: mention Konami's ASIC mappers too
23 March 2021
- 20:5920:59, 23 March 2021 diff hist +27 m PPU pinout No edit summary
- 20:5720:57, 23 March 2021 diff hist +100 m PPU pinout Then again, I suppose it could go either way...
- 20:5620:56, 23 March 2021 diff hist +82 PPU pinout →Signal description: A dual-PPU system would have no use for genlock, but if you're using $2000.6 and the EXT pins then you'd absolutely want to keep them perfectly synchronized with each other
- 20:3220:32, 23 March 2021 diff hist −19 m PPU pinout →Signal description: siliconpr0n has a top-layer image of an RP2C04-0003, and EXT3 is connected directly to GND inside the chip.
19 February 2021
- 02:0402:04, 19 February 2021 diff hist +60 VRC7 pinout Visual analysis confirms that pin 48 *is* derived solely from pins 1 and 2, but it's hard to tell exactly what's going on.
17 February 2021
- 17:5517:55, 17 February 2021 diff hist +6 J.Y. Company ASIC Yes, the title screen actually says "PEPOLE
21 January 2021
- 16:2116:21, 21 January 2021 diff hist +5 m CPU Test Mode No edit summary
- 16:2016:20, 21 January 2021 diff hist +4 m CPU Test Mode The bottom 5 bits of W$401A don't set the "instant phase" - they set the state of the triangle's Sequencer (i.e. $07 and $18 will result in the same effective output)
- 15:5815:58, 21 January 2021 diff hist +35 CPU Test Mode Setting $401A.7 makes the pulse and noise channels output their current volume (even if disabled via length counter), pauses the triangle channel's counter, and stops DPCM from counting up or down
3 December 2020
- 15:0115:01, 3 December 2020 diff hist +101 Family Computer Disk System →Hardware: Clean this up a bit
27 November 2020
- 02:5402:54, 27 November 2020 diff hist 0 m PPU palettes →2C04: 2C04 is a PPU, not a CPU
9 November 2020
- 15:5815:58, 9 November 2020 diff hist −3 m NSF No edit summary
- 15:5115:51, 9 November 2020 diff hist −10 m Visual circuit tutorial No edit summary
- 15:4715:47, 9 November 2020 diff hist −19 m Errata No edit summary
- 15:4615:46, 9 November 2020 diff hist −26 m APU No edit summary
- 12:5912:59, 9 November 2020 diff hist −5 m MMC3 No edit summary
- 12:5412:54, 9 November 2020 diff hist −12 m PPU registers Bulleted lists shouldn't have blank lines between entries, otherwise each entry is rendered as its own distinct list
11 October 2020
- 20:2020:20, 11 October 2020 diff hist +313 m Cycle counting some extra details - explain RMW, and clarify that stack PUSH takes 1 extra cycle and stack POP takes two extra cycles
2 October 2020
- 13:3213:32, 2 October 2020 diff hist +6 m CPU pinout →Signal description: clarify that the actual duty cycle is 15/24, which happens to simplify to 5/8
25 September 2020
- 14:4214:42, 25 September 2020 diff hist +3 m PPU OAM →Dynamic RAM decay
6 September 2020
- 04:0504:05, 6 September 2020 diff hist 0 m VRC7 pinout the data pins are bidirectional, presumably only for debug mode
1 September 2020
- 13:1813:18, 1 September 2020 diff hist +89 PPU palettes →RC2C03B: clarify "color bits 0-1 are 01"
4 August 2020
- 20:5320:53, 4 August 2020 diff hist +174 Talk:Stack No edit summary current
- 20:5320:53, 4 August 2020 diff hist 0 Stack →Pulling values: fix comments to match code current
6 July 2020
- 03:1403:14, 6 July 2020 diff hist 0 m J.Y. Company ASIC →Example Games: typo
