User contributions for Krzysiobal
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23 November 2020
- 22:1222:12, 23 November 2020 diff hist +840 N Talk:NES 2.0 Mapper 292 Wrong description? current
23 October 2020
- 20:1020:10, 23 October 2020 diff hist +104 NES 2.0 Mapper 525 +url to PCB images
19 October 2020
- 17:1517:15, 19 October 2020 diff hist +109 INES Mapper 168 Added link to schematic current
- 17:1217:12, 19 October 2020 diff hist +945 MMC3 pinout Added yet another MMC3's pinout: 7803 9102
- 14:0614:06, 19 October 2020 diff hist +20 Bandai M60001-0115P pinout +category tag current
14 October 2020
- 21:0521:05, 14 October 2020 diff hist +115 SP-80 pinout +1818P current
- 19:1119:11, 14 October 2020 diff hist +196 Talk:NES 2.0 Mapper 554 No edit summary current
13 October 2020
- 08:0108:01, 13 October 2020 diff hist +56 Hardware pinout Added reference to not yet known Huang-1/2 chips
5 October 2020
- 19:5319:53, 5 October 2020 diff hist −1 PPU variants misspell
3 October 2020
- 08:2808:28, 3 October 2020 diff hist +99 PPU variants +PPU=KC-6078
- 08:2708:27, 3 October 2020 diff hist +102 CPU variants No edit summary
- 08:2308:23, 3 October 2020 diff hist 0 N File:PPU=KC-6078.jpg No edit summary current
- 08:2208:22, 3 October 2020 diff hist 0 N File:CPU=KC-6005.jpg No edit summary current
9 September 2020
- 00:5000:50, 9 September 2020 diff hist −6 MMC3 pinout fixed few incorrect pins in "88", fixed swapped WRAM +CE and /WE in 9112 and confirmed WRAM /CE to be OK
24 August 2020
- 08:2408:24, 24 August 2020 diff hist +36 N BU3270S pinout Krzysiobal moved page BU3270S pinout to BU3266 / BU3270 pinout current
- 08:2408:24, 24 August 2020 diff hist 0 m BU3266 / BU3270 pinout Krzysiobal moved page BU3270S pinout to BU3266 / BU3270 pinout
- 08:1708:17, 24 August 2020 diff hist +80 Hardware pinout +FPA-PAL-S01 link
- 08:1608:16, 24 August 2020 diff hist +719 N FPA-PAL-S01 pinout Created page with "Present in NES FOUR Score, PAL Version .---v---. P2 CLk <- |01 22| -- +5V P2 D0 -> |02 21| <- /4P (LOW) or 2P (HIGH) P3 CLK <- |03 20| -> P1 CLK P3..."
- 07:5707:57, 24 August 2020 diff hist +44 BU3266 / BU3270 pinout Fixed direction of INP0 & INP1
23 August 2020
- 07:5707:57, 23 August 2020 diff hist +29 Hardware pinout +BU3270S
- 07:5607:56, 23 August 2020 diff hist +29 N GMNFC 01 OKI pinout Krzysiobal moved page GMNFC 01 OKI pinout to GMNFC 01 pinout current
- 07:5607:56, 23 August 2020 diff hist 0 m GMNFC 01 pinout Krzysiobal moved page GMNFC 01 OKI pinout to GMNFC 01 pinout current
- 07:5507:55, 23 August 2020 diff hist +5,713 N GMNFC 01 pinout Created page with " +-------+ +5V -- / 001 128 \ -- GND..."
- 07:5307:53, 23 August 2020 diff hist +824 N BU3266 / BU3270 pinout Created page with "Custom Nintendo PIO chip found in the New Famicom (HVC-101). This replace the U3 (139), and the U7/U8 (368). .---v---. GND -- |01 32| -- +5V NC ?? |02..."
20 July 2020
- 21:1621:16, 20 July 2020 diff hist +67 Hardware pinout +pt8154
- 21:1421:14, 20 July 2020 diff hist +612 N PT8154 pinout Created page with " .--\/--. CHR A10 <- |01 28| -- VCC PPU A12 -> |02 27| -> CHR A16 PPU A11 -> |03 26| -> CHR A11 PPU A10 -> |04 25| <- CPU D3 CHR A13 <- |05 24|..." current
23 June 2020
- 16:3316:33, 23 June 2020 diff hist +37 PPU registers →Data ($2007) read/write: - nobody mentioned that playing with PPUADDR also clobberts the internal bits that PPUCTRL[1..0] controls.
21 May 2020
- 01:1401:14, 21 May 2020 diff hist +40 NES 2.0 Mapper 383 +Category:Mappers triggering on reads current
20 May 2020
- 23:0923:09, 20 May 2020 diff hist +41 MMC4 +Category:Mappers triggering on reads current
- 23:0923:09, 20 May 2020 diff hist +41 MMC2 +Category:Mappers triggering on reads
- 23:0723:07, 20 May 2020 diff hist +41 NES 2.0 Mapper 355 +Category:Mappers triggering on reads
- 23:0523:05, 20 May 2020 diff hist +40 NES 2.0 Mapper 554 +Category:Mappers triggering on reads current
- 23:0423:04, 20 May 2020 diff hist +79 N Category:Mappers triggering on reads Created page with "The following mappers take action on CPU/PPU reads Category:Mappers" current
- 22:5822:58, 20 May 2020 diff hist −494 NES 2.0 Mapper 554 KS-201 pinout redirection
- 22:5622:56, 20 May 2020 diff hist +176 Hardware pinout No edit summary
- 22:5522:55, 20 May 2020 diff hist 0 m SHARP IX0043AE pinout Krzysiobal moved page SHARP IX0043AE to SHARP IX0043AE pinout
- 22:5522:55, 20 May 2020 diff hist +35 N SHARP IX0043AE Krzysiobal moved page SHARP IX0043AE to SHARP IX0043AE pinout current
- 22:5322:53, 20 May 2020 diff hist +358 N SHARP IX0043AE pinout Created page with "SHARP IX0043AE: 16-pin DIP 0.3 .---v---. EYE2+ <- |01 16| -- +5V EYE2- <- |02 15| <- /RESET |03 14| -> EYE1- |04 13| -> EYE1+..."
- 22:5022:50, 20 May 2020 diff hist +565 N KS-201 pinout Created page with "National Semiconductor KS-201: 28-pin DIP .-\_/-. CPU M2 -> |01 28| -- +5V CPU A1 -> |02 27| -> PRG A13 CPU A2 -> |03 26| -> PRG A14 CPU A3..."
- 22:4422:44, 20 May 2020 diff hist +25 N KS202 pinout Redirected page to VRC3 pinout current
- 22:4222:42, 20 May 2020 diff hist +25 N KS 202 pinout Redirected page to VRC3 pinout current
18 May 2020
- 16:0316:03, 18 May 2020 diff hist +33 N Talk:NES 2.0 Mapper 554 Created page with "Are you in possesion of this PCB?"
13 May 2020
- 08:0608:06, 13 May 2020 diff hist −2,075 Input devices + Famicom 3D glassess, removed +5V/GND from all rows, reformatted table
22 March 2020
- 13:0113:01, 22 March 2020 diff hist +1,601 N UM6558 and UM6559 pinout Created page with "Category:pinouts UM6558 is PPU with additional 8 pins (CD0..CD7) that are used to output currently rendered pixel color. .--\/--. R/W -> |01 48| -- +5V..."
5 March 2020
- 23:1423:14, 5 March 2020 diff hist 0 UM6582 pinout No edit summary current
- 23:0623:06, 5 March 2020 diff hist +31 UM6582 pinout No edit summary
- 23:0523:05, 5 March 2020 diff hist 0 UM6582 pinout No edit summary
- 23:0423:04, 5 March 2020 diff hist +419 UM6582 pinout Added info about the previously unknown pins 15 and 16
- 23:0323:03, 5 March 2020 diff hist 0 N File:UM6582 waveforms.png No edit summary current
- 21:4921:49, 5 March 2020 diff hist 0 m Infrared controllers It's UA6581, not UM6581
