User contributions for Quietust
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1 November 2012
- 16:0416:04, 1 November 2012 diff hist +453 m PPU registers →Controller ($2000) > write
- 14:5014:50, 1 November 2012 diff hist +470 Talk:NTSC video No edit summary
29 October 2012
- 17:1717:17, 29 October 2012 diff hist +353 Talk:NTSC video No edit summary
27 October 2012
- 01:4301:43, 27 October 2012 diff hist +138 INES Mapper 100 Nintendulator uses 100 as a debug mapper - select PRG/CHR banks at will, choosing ROM or RAM (or nametables for PPU)
14 October 2012
- 17:1317:13, 14 October 2012 diff hist +5 m Talk:INES Mapper 151 No edit summary
- 17:1317:13, 14 October 2012 diff hist +180 N Talk:INES Mapper 151 Created page with "Does the VS version of this mapper have controllable mirroring, or does it use 4-screen VRAM like most (all?) VS games do? --~~~~"
11 August 2012
- 00:0100:01, 11 August 2012 diff hist +133 N MediaWiki talk:Sidebar Created page with "The "NESdev BBS" link needs to be updated - it's still pointing to parodius. --~~~~" current
3 August 2012
- 00:5200:52, 3 August 2012 diff hist 0 m Taito X1-017 fix copy/paste error?
24 June 2012
- 16:2916:29, 24 June 2012 diff hist +373 N Talk:INES Mapper 116 Created page with ""However, it seems important that the $8xxx, $9xxx, $Axxx regs be mapped to the entire $1000 region ('''unlike stock VRC2 which is supposedly strictly answering to $8000-$8003..."
22 March 2012
- 02:4002:40, 22 March 2012 diff hist −35 INES Mapper 005 my Copper Bars demo is NROM; though there is an MMC5 version, it was designed specifically to test execution of code from ExRAM but was never (to my knowledge) tested on a real MMC5
16 March 2012
- 03:2203:22, 16 March 2012 diff hist +6 m User:Quietust was expecting to see a delayered 2C02 by now - maybe later?
12 March 2012
- 17:3817:38, 12 March 2012 diff hist −78 m APU the Visual 2A03 just took existing images (produced using whatever expensive methods) and processed them by hand - the only cost was my own time, and I'd like to think it was worth it...
- 13:5613:56, 12 March 2012 diff hist +52 m APU No edit summary
9 December 2011
- 17:5417:54, 9 December 2011 diff hist +127 N Talk:Super NES Mouse Created page with "Is there any actual data in the first byte, or is it just all zeroes? --~~~~"
15 November 2011
- 01:5501:55, 15 November 2011 diff hist +8 m Emulator tests →CPU: that log is from Nintendulator, not FCEUX - I would know, since I'm the one who generated it in the first place
- 01:2301:23, 15 November 2011 diff hist +171 m Talk:APU DMC →DMC find
- 00:5500:55, 15 November 2011 diff hist −3 m Talk:APU DMC No edit summary
- 00:4500:45, 15 November 2011 diff hist +247 m Talk:APU DMC No edit summary
14 November 2011
- 22:5522:55, 14 November 2011 diff hist +2 m Talk:APU DMC No edit summary
- 22:5522:55, 14 November 2011 diff hist +893 Talk:APU DMC have you forgotten that the Visual 2A03 exists?
- 01:4501:45, 14 November 2011 diff hist −1,881 m Bandai EPROM mapper Redirected page to Bandai FCG board current
9 November 2011
- 18:5018:50, 9 November 2011 diff hist −1 m Cartridge and mappers' history people need to learn proper spelling and grammar...
- 18:5018:50, 9 November 2011 diff hist −197 m Cartridge and mappers' history formatting
22 October 2011
- 18:1418:14, 22 October 2011 diff hist +16 m Talk:CPU power up state revised from visual2a03
- 18:0518:05, 22 October 2011 diff hist +60 m Talk:CPU pinout No edit summary
18 October 2011
- 14:5114:51, 18 October 2011 diff hist +213 N File:Vramaddr.jpg VRAM address register within the PPU, with annotations for write enables and data inputs for $2000/$2005/$2006 and the two T->V signals. Everything appears to be consistent with the skinny on NES scrolling. current
17 October 2011
- 23:4223:42, 17 October 2011 diff hist +212 Talk:Power Pad No edit summary
15 October 2011
- 02:2202:22, 15 October 2011 diff hist −24 m User:Quietust Visual6502.org's depackager/delayerer has been unavailable for the past 2 months and is expected to remain unavailable until "early next year", so no visual 2C02 until then :(
11 October 2011
- 16:5216:52, 11 October 2011 diff hist 0 m Accuracy pretty sure this is supposed to be $2007...
28 September 2011
- 17:5917:59, 28 September 2011 diff hist +668 N Talk:NTSC video cursory examination of the PPU's video signal generator
16 September 2011
- 18:2818:28, 16 September 2011 diff hist +673 Talk:CPU pinout just tested pin 30 with my CopyNES, and it DOES enable extra I/O registers
14 September 2011
- 19:5819:58, 14 September 2011 diff hist +175 Talk:CPU pinout was that actually verified?
13 September 2011
- 01:4801:48, 13 September 2011 diff hist +79 m User:Quietust alternate contact
12 September 2011
- 00:5800:58, 12 September 2011 diff hist −2 m User:Quietust No edit summary
2 September 2011
- 03:2803:28, 2 September 2011 diff hist +75 m File:2a03 map.jpg No edit summary
- 03:2703:27, 2 September 2011 diff hist +142 m User:Quietust Visual 2A03 URL changed; also, 2C02 is in progress (though stalled for the past 3 weeks, waiting for the chip to be delayered)
26 August 2011
- 21:2821:28, 26 August 2011 diff hist +8 m Mirroring →4-screen VRAM: this too
- 21:2721:27, 26 August 2011 diff hist +2 m Mirroring →Single-Screen: I'm assuming this is what you meant here...
- 02:2002:20, 26 August 2011 diff hist +305 Talk:NES 2.0 No edit summary
14 July 2011
- 03:1003:10, 14 July 2011 diff hist +164 Talk:CPU pinout →M2: new section
13 July 2011
- 12:4112:41, 13 July 2011 diff hist +212 m Talk:APU Frame Counter No edit summary
- 12:3712:37, 13 July 2011 diff hist +188 m Talk:APU Frame Counter No edit summary
- 03:3603:36, 13 July 2011 diff hist −2 m APU Frame Counter No edit summary
- 03:2003:20, 13 July 2011 diff hist +256 Talk:APU Frame Counter more info
- 03:1603:16, 13 July 2011 diff hist 0 APU Frame Counter make them actually APU cycles...
- 03:1403:14, 13 July 2011 diff hist −17 APU Frame Counter it takes 2 CPU cycles (1 APU cycle) to reset, not 2 APU cycles
12 July 2011
- 19:3319:33, 12 July 2011 diff hist +453 Talk:APU Frame Counter No edit summary
- 13:0713:07, 12 July 2011 diff hist +91 Talk:APU Frame Counter No edit summary
10 July 2011
- 21:1421:14, 10 July 2011 diff hist −237 APU Frame Counter there is NO 240Hz divider - the frame counter is a 15-bit counter (LFSR) that generates triggers at each cycle count; also, subtract 3 from cycle counts because of the reload delay on $4017 write
6 July 2011
- 03:3703:37, 6 July 2011 diff hist +39 m PPU sprite evaluation explain why the sprite engine is seemingly idle during these points - it's waiting for other things to happen within the PPU
