MMC4

MMC4
FxROM

Company	Nintendo
Games	3 in NesCartDB
Complexity	ASIC
Boards	FJROM, FKROM
PRG ROM capacity	256K
PRG ROM window	16K + 16K fixed
PRG RAM capacity	8K
PRG RAM window	unknown
CHR capacity	128K
CHR window	4K + 4K (triggered)
Nametable mirroring	H or V, switchable
Bus conflicts	No
IRQ	No
Audio	No
iNES mappers	010

The Nintendo MMC4 is an ASIC mapper, used on the FxROM board set. The iNES format assigns mapper 10 to these boards. The chip first appeared in August 1988.

Banks

• CPU $6000-$7FFF: 8 KB fixed PRG RAM bank
• CPU $8000-$BFFF: 16 KB switchable PRG ROM bank
• CPU $C000-$FFFF: 16 KB PRG ROM bank, fixed to the last bank
• PPU $0000-$0FFF: Two 4 KB switchable CHR ROM banks
• PPU $1000-$1FFF: Two 4 KB switchable CHR ROM banks

When the PPU reads from specific tiles in the pattern table during rendering, the MMC4 sets a latch that tells it to use a different 4 KB bank number. On the background layer, this has the effect of setting a different bank for all tiles to the right of a given tile, virtually increasing the tile count limit from 256 to 512 without monopolising the CPU.

• PPU reads $0FD8 through $0FDF: latch 0 is set to $FD
• PPU reads $0FE8 through $0FEF: latch 0 is set to $FE
• PPU reads $1FD8 through $1FDF: latch 1 is set to $FD
• PPU reads $1FE8 through $1FEF: latch 1 is set to $FE

Registers

PRG ROM bank select ($A000-$AFFF)

7  bit  0
---- ----
xxxx PPPP
     ||||
     ++++- Select 16 KB PRG ROM bank for CPU $8000-$BFFF

CHR ROM $FD/0000 bank select ($B000-$BFFF)

7  bit  0
---- ----
xxxC CCCC
   | ||||
   +-++++- Select 4 KB CHR ROM bank for PPU $0000-$0FFF
           used when latch 0 = $FD

CHR ROM $FE/0000 bank select ($C000-$CFFF)

7  bit  0
---- ----
xxxC CCCC
   | ||||
   +-++++- Select 4 KB CHR ROM bank for PPU $0000-$0FFF
           used when latch 0 = $FE

CHR ROM $FD/1000 bank select ($D000-$DFFF)

7  bit  0
---- ----
xxxC CCCC
   | ||||
   +-++++- Select 4 KB CHR ROM bank for PPU $1000-$1FFF
           used when latch 1 = $FD

CHR ROM $FE/1000 bank select ($E000-$EFFF)

7  bit  0
---- ----
xxxC CCCC
   | ||||
   +-++++- Select 4 KB CHR ROM bank for PPU $1000-$1FFF
           used when latch 1 = $FE

Mirroring ($F000-$FFFF)

7  bit  0
---- ----
xxxx xxxM
        |
        +- Select nametable mirroring (0: vertical; 1: horizontal)

Hardware

The MMC4 is implemented in a 44-pin TQFP package. Only one revision is known to exist.

Variants

Nintendo's MMC2, used in PxROM boards, is a similar mapper with 8 KB switchable PRG ROM banks, a 24 KB fixed PRG ROM bank, no PRG RAM, and a slightly different behaviour in auto-switching on the left (low) pattern table.

See also

• NES Mapper List by Disch
• Nintendo MMC4 (author unknown)
• Comprehensive NES Mapper Document by \Firebug\, information about mapper's initial state is inaccurate.
• MMC4 Pinout