User:Ben Boldt
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Winning isn't fun. It is game over.
See my Wikipedia User Page.
See my contributions at DataCrystal.
See my college website (archived).
Famicom Network System (aka. Famicom Modem) WIPs:
_____
/ \
CPU A0 -> / 1 100 \ -- +5Vcc
CPU A1 -> / 2 99 \ --
CPU A2 -> / 3 98 \ <> CPU D0
CPU A3 -> / 4 97 \ <> CPU D1
CPU A4 -> / 5 96 \ <> CPU D2
CPU A5 -> / 6 95 \ <> CPU D3
CPU A6 -> / 7 94 \ <> CPU D4
CPU A7 -> / 8 93 \ <> CPU D5
CPU A12 -> / 9 92 \ <> CPU D6
CPU A13 -> / 10 91 \ <> CPU D7
CPU A14 -> / 11 90 \ -- GND
/ROMSEL -> / 12 89 \ --
CPU R/W -> / 13 88 \ --
M2 -> / 14 87 \ --
-- / 15 86 \ --
-- / 16 85 \ --
/IRQ <- / 17 84 \ --
+5Vcc -- / 18 83 \ --
-- / 19 82 \ --
Xtal -- / 20 81 \ -- +5Vcc
Xtal -- / 21 \
-- / 22 O /
GND -- / 23 80 / --
-- / 24 79 / --
-- / 25 78 / --
-- / 26 Nintendo RF5C66 77 / --
-- / 27 Package QFP-100, 0.65mm pitch 76 / --
-- / 28 75 / --
-- / 29 74 / --
-- / 30 73 / --
/ O 72 / --
\ 71 / --
-- \ 31 70 / -- GND
-- \ 32 69 / --
-- \ 33 68 / -- Orientation:
CHR RAM /CE <- \ 34 67 / -- --------------------
-- \ 35 66 / -- 80 51
-- \ 36 65 / -- | |
-- \ 37 64 / -- .-----------.
CHR RAM /CE <- \ 38 63 / -- 81-|O Nintendo |-50
GND -- \ 39 62 / -- | RF5C66 |
-- \ 40 61 / -- 100-| GCD 4R O|-31
-- \ 41 60 / -- \-----------'
-- \ 42 59 / -- +5Vcc | |
GND -- \ 43 58 / -- 01 30
GND -- \ 44 57 / --
GND -- \ 45 56 / -- Legend:
GND -- \ 46 55 / -- ------------------------------
CIRAM A10 <- \ 47 54 / -- --[RF5C66]-- Power
PPU A11 -> \ 48 53 / -- ->[RF5C66]<- RF5C66 input
PPU A10 -> \ 49 52 / -- <-[RF5C66]-> RF5C66 output
-- \ 50 51 / -- <>[RF5C66]<> Bidirectional
\ / ??[RF5C66]?? Unknown
\ / f Famicom connection
\ / r ROM chip connection
V R RAM chip connection
_____
/ \
U6 RAM A0 <- / 1 100 \ --
U6 RAM A1 <- / 2 99 \ <> U6 RAM D0
U6 RAM A2 <- / 3 98 \ <> U6 RAM D1
U6 RAM A3 <- / 4 97 \ <> U6 RAM D2
U6 RAM A4 <- / 5 96 \ <> U6 RAM D3
U6 RAM A5 <- / 6 95 \ <> U6 RAM D4
U6 RAM A6 <- / 7 94 \ <> U6 RAM D5
U6 RAM A7 <- / 8 93 \ <> U6 RAM D6
+5Vcc -- / 9 92 \ <> U6 RAM D7
U6 RAM A8 <- / 10 91 \ -- +5Vcc
U6 RAM A9 <- / 11 90 \ --
U6 RAM A10 <- / 12 89 \ --
U6 RAM A11 <- / 13 88 \ <- CPU A2
U6 RAM A12 <- / 14 87 \ <- CPU A1
-- / 15 86 \ <- CPU A0
-- / 16 85 \ --
-- / 17 84 \ --
GND -- / 18 83 \ <- M2
-- / 19 82 \ --
U6 RAM /WR <- / 20 81 \ --
U6 RAM /CE <- / 21 \
-- / 22 O /
-- / 23 80 / --
GND -- / 24 79 / --
GND -- / 25 78 / -- GND
GND -- / 26 Nintendo RF5A18 77 / --
-- / 27 Package QFP-100, 0.65mm pitch 76 / --
-- / 28 75 / --
-- / 29 74 / --
-- / 30 73 / --
/ O 72 / --
\ 71 / --
+5Vcc -- \ 31 70 / --
-- \ 32 69 / --
-- \ 33 68 / -- Orientation:
-- \ 34 67 / -- --------------------
-- \ 35 66 / -- 80 51
-- \ 36 65 / -- | |
-- \ 37 64 / -- +5Vcc .-----------.
-- \ 38 63 / -- 81-|O RF5A18 |-50
-- \ 39 62 / -- | Nintendo |
-- \ 40 61 / -- 100-| GCD 8C O|-31
-- \ 41 60 / -- \-----------'
-- \ 42 59 / -- | |
GND -- \ 43 58 / -- 01 30
-- \ 44 57 / --
-- \ 45 56 / -- Legend:
-- \ 46 55 / -- ------------------------------
+5Vcc -- \ 47 54 / -- --[RF5A18]-- Power
+5Vcc -- \ 48 53 / -- ->[RF5A18]<- RF5A18 input
-- \ 49 52 / -- <-[RF5A18]-> RF5A18 output
-- \ 50 51 / -- <>[RF5A18]<> Bidirectional
\ / ??[RF5A18]?? Unknown
\ / f Famicom connection
\ / r ROM chip connection
V R RAM chip connection
_____
/ \
-- / 1 44 \ <- CPU A3
CPU A2 -> / 2 43 \ <- CPU A8
CPU A1 -> / 3 42 \ <- CPU A11
-- / 4 41 \ --
CPU A0 -> / 5 40 \ --
GND -- / 6 39 \ --
-- / 7 38 \ -- +5Vcc
-- / 8 37 \ --
-- / 9 36 \ <- CPU A10
-- / 10 35 \ --
-- / 11 34 \ <- CPU A9
/ Nintendo LH5323M1 \
\ /
-- \ 12 33 / <- CPU A4
-- \ 13 32 / --
CPU D0 <> \ 14 31 / --
CPU D1 <> \ 15 30 / <- CPU A5
CPU D2 <> \ 16 29 / <- CPU A7
GND -- \ 17 28 / -- GND
CPU D3 <> \ 18 27 / --
CPU D4 <> \ 19 26 / <- CPU A6
CPU D5 <> \ 20 25 / -- GND
CPU D6 <> \ 21 24 / --
CPU D7 <> \ 22 23 / --
\ /
\ /
\ /
V
_______ _______
| \_/ |
n/c? -- | 1 28 | -- +5Vcc
PPU A12 -> | 2 O 27 | <- PPU /WR
PPU A7 -> | 3 26 | <- +CE: U3=RF5C66 34/38, U4=PPU /A13
PPU A6 -> | 4 25 | <- PPU A8
PPU A5 -> | 5 24 | <- PPU A9
PPU A4 -> | 6 CHR 23 | <- PPU A11
PPU A3 -> | 7 RAM 22 | <- /OE: PPU /RD
PPU A2 -> | 8 U3/U4 21 | <- PPU A10
PPU A1 -> | 9 20 | <- /CE: U3=PPU A13, U4=RF5C66 34/38
PPU A0 -> | 10 19 | <> PPU D7
PPU D0 <> | 11 18 | <> PPU D6
PPU D1 <> | 12 17 | <> PPU D5
PPU D2 <> | 13 16 | <> PPU D4
GND -- | 14 15 | <> PPU D3
|_______________|
