Namco 163

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Revision as of 08:18, 8 November 2011 by Drag (talk | contribs) (IRQ counter operation. In Disch's doc, he mentions that sources vary on whether the counter wraps or not.)
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The Namco 106 and Namco 163 are ASIC mappers, assigned to iNES mapper 19. A variant of this mapper with hardwired mirroring is assigned to iNES mapper 210.

Overview

  • PRG ROM size: Up to 512 KB
  • PRG ROM bank size: 8 KB
  • PRG RAM: Up to 8 KB
  • CHR capacity: Up to 256 KB ROM and/or 32 KB RAM simultaneously
  • CHR bank size: 1 KB
  • Nametable mirroring: Controlled by mapper (Mapper 19), hardwired (Mapper 210)
  • Subject to bus conflicts: No

Banks

  • CPU $6000-$7FFF: 8 KB PRG RAM bank
  • CPU $8000-$9FFF: 8 KB switchable PRG ROM bank
  • CPU $A000-$BFFF: 8 KB switchable PRG ROM bank
  • CPU $C000-$DFFF: 8 KB switchable PRG ROM bank
  • CPU $E000-$FFFF: 8 KB PRG ROM bank, fixed to the last bank
  • PPU $0000-$03FF: 1 KB switchable CHR bank
  • PPU $0400-$07FF: 1 KB switchable CHR bank
  • PPU $0800-$0BFF: 1 KB switchable CHR bank
  • PPU $0C00-$0FFF: 1 KB switchable CHR bank
  • PPU $1000-$13FF: 1 KB switchable CHR bank
  • PPU $1400-$17FF: 1 KB switchable CHR bank
  • PPU $1800-$1BFF: 1 KB switchable CHR bank
  • PPU $1C00-$1FFF: 1 KB switchable CHR bank

Registers

The n106 has 19 registers within $4800-$FFFF, except $6000-$7FFF which is WRAM. Each register occupies a range of $800 bytes, so $4800-$4FFF all refers to one register, $5000-$57FF all refers to another register, and so on.

Sound Data Port ($4800-$4FFF) r/w

See Namco 163 audio.

IRQ Counter (low) ($5000-$57FF) r/w

7  bit  0
---- ----
IIII IIII
|||| ||||
++++-++++- Low 8 bits of IRQ counter

IRQ Counter (high) / IRQ Enable ($5800-$5FFF) r/w

7  bit  0
---- ----
EIII IIII
|||| ||||
|+++-++++- High 7 bits of IRQ counter
+--------- IRQ Enable: (0: disabled; 1: enabled)

CHR Select 1 ($8000-$87FF) w

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++- Select 1KB page of CHR-ROM or CHR-RAM at $0000

Note: Pages $E0-$FF are CHR-RAM, as long as $E800.6 is set to 0. If $E800.6 is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.

CHR Select 2 ($8800-$88FF) w

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++- Select 1KB page of CHR-ROM or CHR-RAM at $0400

Note: Pages $E0-$FF are CHR-RAM, as long as $E800.6 is set to 0. If $E800.6 is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.

CHR Select 3 ($9000-$97FF) w

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++- Select 1KB page of CHR-ROM or CHR-RAM at $0800

Note: Pages $E0-$FF are CHR-RAM, as long as $E800.6 is set to 0. If $E800.6 is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.

CHR Select 4 ($9800-$9FFF) w

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++- Select 1KB page of CHR-ROM or CHR-RAM at $0C00

Note: Pages $E0-$FF are CHR-RAM, as long as $E800.6 is set to 0. If $E800.6 is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.

CHR Select 5 ($A000-$A7FF) w

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++- Select 1KB page of CHR-ROM or CHR-RAM at $1000

Note: Pages $E0-$FF are CHR-RAM, as long as $E800.7 is set to 0. If $E800.7 is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.

CHR Select 6 ($A800-$AFFF) w

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++- Select 1KB page of CHR-ROM or CHR-RAM at $1400

Note: Pages $E0-$FF are CHR-RAM, as long as $E800.7 is set to 0. If $E800.7 is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.

CHR Select 7 ($B000-$B7FF) w

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++- Select 1KB page of CHR-ROM or CHR-RAM at $1800

Note: Pages $E0-$FF are CHR-RAM, as long as $E800.7 is set to 0. If $E800.7 is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.

CHR Select 8 ($B800-$BFFF) w

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++- Select 1KB page of CHR-ROM or CHR-RAM at $1C00

Note: Pages $E0-$FF are CHR-RAM, as long as $E800.7 is set to 0. If $E800.7 is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.

Nametable Select 1 ($C000-$C7FF) w

7  bit  0
---- ----
NNNN NNNN
|||| ||||
++++-++++- Select nametable at $2000:
             $00-$DF: Use a 1KB page of CHR-ROM as a nametable
             $E0-$FF: Use the NES's internal nametables (even values for A, odd values for B)

Note: On mapper 210, this register has no effect.

Nametable Select 2 ($C800-$CFFF) w

7  bit  0
---- ----
NNNN NNNN
|||| ||||
++++-++++- Select nametable at $2400:
             $00-$DF: Use a 1KB page of CHR-ROM as a nametable
             $E0-$FF: Use the NES's internal nametables (even values for A, odd values for B)

Note: On mapper 210, this register has no effect.

Nametable Select 3 ($D000-$D7FF) w

7  bit  0
---- ----
NNNN NNNN
|||| ||||
++++-++++- Select nametable at $2800:
             $00-$DF: Use a 1KB page of CHR-ROM as a nametable
             $E0-$FF: Use the NES's internal nametables (even values for A, odd values for B)

Note: On mapper 210, this register has no effect.

Nametable Select 4 ($D800-$DFFF) w

7  bit  0
---- ----
NNNN NNNN
|||| ||||
++++-++++- Select nametable at $2C00:
             $00-$DF: Use a 1KB page of CHR-ROM as a nametable
             $E0-$FF: Use the NES's internal nametables (even values for A, odd values for B)

Note: On mapper 210, this register has no effect.

PRG Select 1 ($E000-$E7FF) w

7  bit  0
---- ----
..PP PPPP
  || ||||
  ++-++++- Select 8KB page of PRG-ROM at $8000

PRG Select 2 / CHR-RAM Enable ($E800-$EFFF) w

7  bit  0
---- ----
HLPP PPPP
|||| ||||
||++-++++- Select 8KB page of PRG-ROM at $A000
|+-------- Disable CHR-RAM at $0000-$0FFF
|            0: Pages $E0-$FF are CHR-RAM
|            1: Pages $E0-$FF are the last $20 banks of CHR-ROM)
+--------- Disable CHR-RAM at $1000-$1FFF
             0: Pages $E0-$FF are CHR-RAM
             1: Pages $E0-$FF are the last $20 banks of CHR-ROM)

PRG Select 3 ($F000-$F7FF) w

7  bit  0
---- ----
..PP PPPP
  || ||||
  ++-++++- Select 8KB page of PRG-ROM at $C000

Sound Address Port ($F800-$FFFF) w

See Namco 163 audio.

IRQ Operation

The IRQ is a 15-bit CPU cycle up-counter. $5000 and $5800 provide direct access to the counter itself (i.e., this isn't a reload value). Games can read and write to these registers in realtime.

The IRQ counter increments on each CPU cycle. Upon reaching $7FFF, an IRQ is fired. However, it is unknown if the counter wraps to $0000 afterwards. Reading/Writing to $5000 or $5800 will acknowledge any pending IRQs.

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