NES 2.0 submappers

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Revision as of 22:34, 27 October 2015 by Rainwarrior (talk | contribs) (mapper 34 (BNROM / NINA-001) promoted from proposals)
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Submapper is a term used in the NES 2.0 header for 4-bit codes designating functionally distinct variants of iNES mappers that cannot be distinguished by the memory size fields alone. Most emulators using iNES format distinguish these using CRC, SHA-1, or other hashes of the PRG ROM and CHR ROM, but this works only for games published prior to 1997, not for fan translations or ROM hacks, and not for new games on the same mapper.

Submapper 0 represents the default iNES behavour, so that backward compatibility is maintained with existing ROMs.

Submapper allocations that are listed as "deprecated" were assigned by kevtris' original proposal, but have no known use cases. The deprecation reserves these unused allocations to maintain continuity and compatibility.

This document is a living specification. Proposals for new submappers should be made at: Proposals.

001: MMC1

Most MMC1 boards are compatible with the standard mapper 1 behavior (submapper 0).

Boards with CHR-RAM usually reuse the CHR banking lines to address other things.

  • SUROM, SOROM, and SXROM implement extra PRG-ROM and PRG-RAM banking (deprecated submappers 1, 2, 4).
  • SNROM implements a redundant PRG-RAM enable (no assigned submapper).

The variant MMC1A chip was assigned to mapper 155 (deprecated submapper 3).

Most boards with 32k of PRG-ROM have no PRG banking: SEROM, SHROM, SH1ROM (submapper 5).

001: 0

Normal behavior.

001: 1, 2, 4 = SUROM, SOROM, SXROM

Deprecated.

These submappers are a redundancy. The difference between these boards and the "normal" MMC1 implementation is exclusively dependent on the sizes of CHR, PRG RAM, and PRG ROM. Because of this, the addition of PRG RAM to the NES 2.0 specification was enough to make these compatible with submapper 0.

These three boards used 8k CHR RAM, and reused the CHR banking bits to bank PRG ROM and RAM instead. The specific boards can be detected by these sizes, or simply emulated together in submapper 0: 

$A000 and $C000:
4bit0
-----
EDCBA
|||||
||||+- CHR A12
|||+-- CHR A13, if extant (CHR >= 16k)
||+--- CHR A14, if extant; and PRG RAM A14, if extant (PRG RAM = 32k, submapper 4)
|+---- CHR A15, if extant; and PRG RAM A13, if extant (PRG RAM >= 16k, submappers 2, 4)
+----- CHR A16, if extant; and PRG ROM A18, if extant (PRG ROM = 512k, submappers 1, 4)

The following games are on SUROM (submapper 1):

SOROM (submapper 2):

SXROM (submapper 4):

If any NES 2.0 ROMs are found using these deprecated submappers, the CHR, PRG RAM, and PRG ROM sizes must appropriately match to be a valid header.

001: 3

Deprecated.

This originally described a submapper that was already implemented as iNES Mapper 155.

001: 5 Fixed PRG

SEROM, SHROM, SH1ROM use a fixed 32k PRG ROM with no banking support. (This is distinct from SIROM which has 32k of bankable PRG ROM.)

PRG ROM A14 is connected directly to CPU A14 (and MMC1 A14 input) instead of MMC1 A14 output.

Existing games are compatible with submapper 0 if $8000-BFFF is initialized to the low bank, and $C000-FFFF is initialized to the high bank. These boards were used in several games: SEROM SHROM SH1ROM

Test ROM:

004: MMC3

iNES Mapper 004 represents the most common boards using these four ICs: early MMC3, late MMC3, MC-ACC, and MMC6.

There are three known kinds of IRQ:

  1. MMC3A: IRQ is asserted on A12 rise, and loading the latch with 0 disables IRQ. Some chips labeled MMC3B also have this "old style" behavior. No games are known to rely on this behavior.
  2. MMC3C: IRQ is asserted on A12 rise, and loading the latch with 0 produces an IRQ on every scanline. Some chips labeled MMC3B also have this "new style" behavior, as does the MMC6. Some later games rely on this behavior.
  3. MC-ACC: IRQ is asserted on A12 fall, typically four pixels later than MMC3C. Interrupts can be produced every scanline, like the MMC3C.[1]

There are two known kinds of PRG RAM enable:

  1. MMC3: One set of enable bits controls the entire chip.
  2. MMC6: The first and second enables control the first and second half of PRG RAM, and an additional enable in bit 5 of $8000 controls the whole PRG RAM.

The TEROM and TFROM boards have two jumpers that can respectively disable IRQs and force hard-wired mirroring. It is believed that nothing was ever released that used them.

004: 0

Normal. (MMC3C)

004: 1 MMC6

MMC6 has an alternative PRG-RAM enable and write protection scheme designed for its internal 1k PRG RAM.

  • StarTropics
  • StarTropics 2

004: 2

Deprecated.

This originally described MMC3C with hard wired mirroring. No games are known to require this.

004: 3 MC-ACC

MC-ACC

The MC-ACC is found in 13 second-source PCBs manufactured by Acclaim:

  • Alien³
  • George Foreman's KO Boxing
  • The Incredible Crash Dummies
  • Mickey's Safari in Letterland
  • Roger Clemens' MVP Baseball
  • Rollerblade Racer
  • The Simpsons: Bart vs. The World
  • The Simpsons: Bartman Meets Radioactive Man
  • Spider-Man: Return of the Sinister Six
  • T&C Surf Designs 2: Thrilla's Surfari
  • T2: Terminator 2: Judgment Day
  • WWF King of the Ring
  • WWF WrestleMania: Steel Cage Challenge

032: Irem G101

A variation of this mapper requires hardwired one-screen mirroring and entirely ignores writes to $9000.

032: 0

Normal (H/V mapper-controlled mirroring)

032: 1 Major League

CIRAM A10 is tied high (fixed one-screen mirroring) and PRG banking style is fixed as 8+8+16F

034: BNROM / NINA-001

This iNES mapper unfortunately combines the unrelated BNROM and NINA-001 mappers.

034: 0

Normal.

To disambiguate the two mappers, emulators have taken various approaches:

  • The presense of CHR larger than 8 KiB unambiguously requires NINA-001, as BNROM has no CHR banking.
  • The presence of CHR-RAM is taken to imply BNROM, because both extant BNROM games use CHR-RAM.
  • CRC tests may be used to select a mapper for previously known ROMs.
  • Implement both mappers simultaneously. This is compatible with existing games.

Selecting a single implementation based on CHR results in greater accuracy, since no game was ever intended for the combined definition.

New programs should not attempt to use a combined BNROM + NINA-001 mapper because this is not reliably available across emulators. Unusual combinations like NINA-001 with CHR-RAM are theoretically possible, but unlikely to be emulated consistently.

034: 1 NINA-001

NINA-001 only.

Test ROM:

034: 2 BNROM

BNROM only.

Some unlicensed boards by Union Bond were a variation of BNROM that included PRG RAM. These may also use this submapper if PRG RAM is specified in the NES 2.0 header.

Test ROM:

068: Sunsoft 4

In addition to its normal function, the Sunsoft 4 IC was used in Nantettatte!! Baseball, which allowed a second expansion cartridge to be plugged into it.

068: 0

0: Normal (max 256KiB PRG)

068: 1 Dual Cartridge System

1: Sunsoft Dual Cartridge System a.k.a. NTB-ROM (max 128KiB PRG, licensing IC present, external option ROM of up to 128KiB should be selectable by a second menu)

071: Codemasters

Some games use this with 1-screen mirroring, where the mapper's mirroring control bit is wired directly to CIRAM A10. Others have hardwired horizontal or vertical mirroring.

Another variation of this mapper was used in the Quattro multicarts, but these have been reassigned to mapper 232.

071: 0

Hardwired horizontal or vertical mirroring.

071: 1 Fire Hawk

Mapper controlled single-screen mirroring.

078: Cosmo Carrier / Holy Diver

This mapper unfortunately combines two games with incompatible mirroring control.

One game uses this with 1-screen mirroring, where the mapper's mirroring control bit is wired directly to CIRAM A10. The other can switch between horizontal and vertical mirroring, using a multiplexer between PPU A10 and PPU A11 whose output is sent to CIRAM A10.

078: 0

Unspecified.

078: 1 Cosmo Carrier

Single-screen mirroring (nibble-swapped mapper 152).

078: 2

Deprecated.

This described a variation with fixed vertical mirroring, and WRAM. There is no known use case.

078: 3 Holy Diver

Mapper-controlled H/V mirroring.

210: Namco 175 and 340

Mapper 210 doesn't distinguish between the 175's hardwired mirroring and 340's 1/H/V mirroring.

Also, previous confusion and compatibility code used by Namco when they were developing games means that many 175- and 340- using games are incorrectly tagged as mapper 19.

210: 0

No advisory statement is made (use runtime heuristics suggested at mapper 210)

210: 1 N175

Namco 175. Hardwired mirroring, no IRQ.

  • Famista '91
  • Family Circuit '91
  • Chibi Maruko-chan: Uki Uki Shopping
  • Heisei Tensai Bakabon / Genius Bakabon

210: 2 N340

Namco 340. 1/H/V mirroring, no IRQ, no internal or external RAM.

  • Splatterhouse
  • Wagyan Land 2
  • Famista '92
  • Dream Master
  • Top Striker
  • Wagyan Land 3
  • Famista '93
  • Famista '94

232: Quattro

Similar to #71 above, with a separate register controlling which 64 KiB outer bank of the PRG ROM is used. This is used for the Quattro multicarts.

The Aladdin Deck Enhancer version of these multicarts used a different banking scheme.

232: 0

0: Normal

232: 1 Aladdin Deck Enhancer

Aladdin Deck Enhancer variation. Swap the bits of the outer bank number.

References

  1. ↑ MC-ACC IRQ test results
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