Fixed cycle delay

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Delay code

Shortest possible CPU code that creates N cycles of delay, depending on constraints.

All branch instructions assume that no page wrap occurs.

Explanations on the requirements:

  • @zp_temp means you have a zeropage address that you can write random data into.
  • @rts12 means you know a memory address that contains byte $60 (RTS).
  • @rts14 means you know a memory address that contains a harmless 2-cycle instruction that fits your constraints (such as CLC, LDA #0, or NOP), followed by RTS.
  • @rts15 means you know a memory address that contains a JMP that jumps to another location that contains RTS.
  • Alternatively, @rts15 means you know a memory address that contains a harmless 3-cycle instruction that fits your constraints (such as LDA $00), followed by RTS.

0 cycles

0 bytes

1 cycle

Impossible

2 cycles

Canonical (1 bytes)

NOP


3 cycles

1 bytes

If you can clobber S:

PHA

2 bytes

If you can clobber Z, N and A:

LDA $00

If you can clobber Z, N and V:

BIT $00

If you have @zptemp:

STA @zptemp

If you can use unofficial opcodes:

NOP $00

Canonical (3 bytes)

JMP *+3


4 cycles

1 bytes

If you can clobber Z, N, A and S:

PLA

Synthetic (2 bytes)

{2-cycle delay} + {2-cycle delay}


5 cycles

Synthetic (2—4 bytes)

{2-cycle delay} + {3-cycle delay}


6 cycles

2 bytes

If you can clobber S:

PHA
PHA

Synthetic (3 bytes)

{2-cycle delay} + {4-cycle delay}


7 cycles

Canonical (2 bytes)

PHP
PLP


8 cycles

2 bytes

If you can clobber Z, N, A and S:

PLA
PLA

3 bytes

If you can clobber Z, N, A and X:

TSX
PLA
TXS

Synthetic (3—4 bytes)

{2-cycle delay} + {6-cycle delay}


9 cycles

Synthetic (3 bytes)

{2-cycle delay} + {7-cycle delay}


10 cycles

3 bytes

If you can clobber S:

PHA
PHP
PLP

4 bytes

Clobbers nothing, requires nothing:

PHP
BIT $00
PLP


11 cycles

3 bytes

If you can clobber Z, N, A and S:

PHA
PLA
PLA

Synthetic (4 bytes)

{2-cycle delay} + {9-cycle delay}


12 cycles

3 bytes

If you have @rts12:

JSR @rts12

If you can clobber Z, N, A and S:

PLA
PLA
PLA

4 bytes

If you can clobber Z and N:

ROL $00,X
ROR $00,X

Synthetic (4—5 bytes)

{2-cycle delay} + {10-cycle delay}


13 cycles

4 bytes

If you can clobber S:

PHA
PHA
PHP
PLP

Synthetic (5 bytes)

{2-cycle delay} + {11-cycle delay}


14 cycles

3 bytes

If you have @rts14:

JSR @rts14

Synthetic (4 bytes)

{7-cycle delay} + {7-cycle delay}


15 cycles

3 bytes

If you have @rts15:

JSR @rts15

4 bytes

If you can clobber S and you have @rts12:

PHA
JSR @rts12

If you can clobber Z, N, A and S:

PHA
PLA
PLA
PLA

5 bytes

If you can clobber Z, N and A and you have @rts12:

LDA $00
JSR @rts12

If you can clobber Z, N and X:

PHA
TSX
PLA
TXS
PLA

If you can clobber A and X:

PHP
TSX
PLA
TXS
PLP

If you can clobber Z, N and V and you have @rts12:

BIT $00
JSR @rts12

If you have @zptemp and you have @rts12:

STA @zptemp
JSR @rts12

If you can use unofficial opcodes and you have @rts12:

NOP $00
JSR @rts12

Synthetic (5—6 bytes)

{2-cycle delay} + {13-cycle delay}


16 cycles

4 bytes

If you can clobber Z, N, A and S:

PLA
PLA
PLA
PLA

Synthetic (4—5 bytes)

{2-cycle delay} + {14-cycle delay}


17 cycles

4 bytes

If you have @rts15:

NOP
JSR @rts15

If you can clobber S and you have @rts14:

PHA
JSR @rts14

5 bytes

If you can clobber Z, N and A and you have @rts14:

LDA $00
JSR @rts14

If you can clobber Z, N and V and you have @rts14:

BIT $00
JSR @rts14

If you have @zptemp and you have @rts14:

STA @zptemp
JSR @rts14

If you can clobber S:

PHA
PHP
PLP
PHP
PLP

If you can use unofficial opcodes and you have @rts14:

NOP $00
JSR @rts14

Synthetic (6 bytes)

{7-cycle delay} + {10-cycle delay}


18 cycles

4 bytes

If you can clobber S and you have @rts15:

PHA
JSR @rts15

If you can clobber Z, N, A and S and you have @rts14:

PLA
JSR @rts14

5 bytes

If you can clobber Z, N and A and you have @rts15:

LDA $00
JSR @rts15

If you can clobber Z, N and V and you have @rts15:

BIT $00
JSR @rts15

If you have @zptemp and you have @rts15:

STA @zptemp
JSR @rts15

If you can clobber S and you have @rts12:

PHA
PHA
JSR @rts12

If you can use unofficial opcodes and you have @rts15:

NOP $00
JSR @rts15

Synthetic (5—6 bytes)

{2-cycle delay} + {16-cycle delay}


19 cycles

4 bytes

If you can clobber Z, N, A and S and you have @rts15:

PLA
JSR @rts15

5 bytes

If you have @rts12:

PHP
PLP
JSR @rts12

If you have @rts15:

NOP
NOP
JSR @rts15

If you can clobber Z, N, A and S:

PHA
PLA
PLA
PLA
PLA

If you can clobber S and you have @rts14:

NOP
PHA
JSR @rts14

6 bytes

Clobbers nothing, requires nothing:

PHP
ROL $00,X
ROR $00,X
PLP


20 cycles

5 bytes

If you can clobber Z, N, A and S:

PLA
PLA
PLA
PLA
PLA

If you can clobber S and you have @rts14:

PHA
PHA
JSR @rts14

6 bytes

If you can clobber Z, N, A and X:

TSX
PLA
PLA
PLA
PLA
TXS

If you can clobber S:

PHA
PHA
PHP
PLP
PHP
PLP

Synthetic (5—7 bytes)

{2-cycle delay} + {18-cycle delay}


21 cycles

5 bytes

If you can clobber Z, N and Y:

LDY #4
@D:
DEY
BNE @D

If you can clobber Z, N and X:

LDX #4
@D:
DEX
BNE @D

If you can clobber S and you have @rts15:

PHA
PHA
JSR @rts15

Synthetic (5—6 bytes)

{7-cycle delay} + {14-cycle delay}


22 cycles

5 bytes

If you have @rts15:

PHP
PLP
JSR @rts15

If you can clobber Z, N, A and S and you have @rts14:

PLA
PLA
JSR @rts14

6 bytes

If you can clobber Z, N and Y:

LDY #3
@D:
NOP
DEY
BNE @D

If you can clobber Z, N and X:

LDX #3
@D:
NOP
DEX
BNE @D

If you can clobber S and you have @rts12:

PHA
PHP
PLP
JSR @rts12

7 bytes

If you have @rts12:

PHP
BIT $00
PLP
JSR @rts12

If you can clobber X:

PHP
PHA
TSX
PLA
TXS
PLA
PLP

Synthetic (6—8 bytes)

{2-cycle delay} + {20-cycle delay}


23 cycles

5 bytes

If you can clobber Z, N, A and S and you have @rts15:

PLA
PLA
JSR @rts15

6 bytes

If you can clobber Z, N, A and X and you have @rts15:

TSX
PLA
TXS
JSR @rts15

If you can clobber Z, N, A and S:

PHA
PLA
PLA
PLA
PLA
PLA

Synthetic (6—7 bytes)

{2-cycle delay} + {21-cycle delay}


24 cycles

6 bytes

If you have @rts12:

JSR @rts12
JSR @rts12

If you have @rts15:

NOP
PHP
PLP
JSR @rts15

If you can clobber Z, N, A and S:

PLA
PLA
PLA
PLA
PLA
PLA

If you can clobber S and you have @rts14:

PHA
PHP
PLP
JSR @rts14

7 bytes

If you can clobber Z, N, A and X:

TSX
PLA
PLA
PLA
PLA
PLA
TXS

If you have @rts14:

PHP
BIT $00
PLP
JSR @rts14

If you can clobber S:

PHA
PHP
PLP
PHP
PLP
PHP
PLP

Synthetic (8 bytes)

{7-cycle delay} + {17-cycle delay}

More

Bisqwit's 6502 delay_n macro set for ca65: http://bisqwit.iki.fi/src/6502-inline_delay.7z

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