Talk:MMC3

There's some documentation about the differences between MMC3 revisions here: [1] I'll add them in at some point, if nobody else does. --Drag 18:00, 19 April 2011 (UTC)

PRG RAM bank behavior

When PRG RAM is accessed via $6000-$7FFF, what does the MMC3 put on the upper PRG ROM address lines? --Tepples 23:24, 20 April 2011 (UTC)

Ideally, the MMC3 wouldn't put anything on the ROM address lines. :P Either way, if the CPU is accessing $6000-7FFF, I'd imagine whatever chip is selected would see %011xxxxx xxxxxxxx on its address lines. RAM would just see the x part, and whatever mapper-supplemented upper address lines if the RAM is bankswitched. --Drag 04:05, 21 April 2011 (UTC)

When I hear "wouldn't put anything", I think "high impedance". It appears you claim that if $6000-$7FFF is accessed, the PRG A13 through PRG A18 outputs from the mapper are high-Z, not the value in either PRG bank register. Do I misunderstand? --Tepples 22:42, 21 April 2011 (UTC)

The simplest thing electrically is to never disable the address drivers. Given how MMC3 works I'd guess it drives the upper address lines high. Lidnariq 18:08, 22 April 2011 (UTC)

Actually, I'm not entirely sure I understand what you're saying. When you say PRG ROM address lines, I thought you meant the address lines on the actual ROM. Yes, even if the CPU is accessing $6000-7FFF, the ROM would still see the address bus, but it won't do anything with it, because the mapper won't select the chip. That's what I meant by "wouldn't put anything on the ROM address lines". Even though it's physically putting something there, the ROM is disabled so it never does anything with it.

If you're talking about what happens with WRAM, I imagine the chip wouldn't have the upper three address lines, unless the RAM is bankswitched. --Drag 07:33, 25 April 2011 (UTC)