NES 2.0 Mapper 315: Difference between revisions

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(Created page with "Category:Multicart mappersCategory:MMC3-like mappersCategory:Mappers with scanline IRQs NES 2.0 Mapper 315 is used for multicarts using ''820732C''- and ''830134C'...")
 
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==Outer Bank Register ($6800, write)==
==Outer Bank Register ($6800, write)==
  Mask: $E800
  Mask: probably $E000
   
   
  D~7654 3210
  D~7654 3210

Revision as of 00:34, 30 June 2018

NES 2.0 Mapper 315 is used for multicarts using 820732C- and 830134C-numbered PCBs such as 4-in-1 Street Blaster 5. Its UNIF board name is BMC-830134C.

Registers

MMC3-compatible registers ($8000-$FFFF, write)

These registers function identically to a normal MMC3, except in GNROM mode.

Outer Bank Register ($6800, write)

Mask: probably $E000

D~7654 3210
  ---------
  .... CPpC
       |||+- Select 256 KiB outer CHR-ROM bank (i.e. CHR A18)
       |++-- Select 128 KiB outer PRG-ROM bank (i.e. PRG A17-A18)
       | +-- Select 128 KiB outer CHR-ROM bank (i.e. CHR A17)
       +---- Select  64 KiB outer CHR-ROM bank (i.e. CHR A16)
  • This bank register functions as a substitute for WRAM and can only be written to if $A001 bit 7 is set and $A001 bit 6 is clear.
  • The Outer Bank Register's PRG A17-A18 replace the MMC3's, while the Outer Bank Register's CHR A16 and CHR A17 are OR'd with the respective MMC3 bits.

GNROM-like Mode

If PRG A17 and PRG A18 are both 1 (i.e. if $6800 AND $06==$06), standard MMC3 PRG-ROM banking is replaced with an odd GNROM-ish mode, in which the MMC3's CPU A14 input is held low and PRG A14 is directly connected to CPU A14, resulting in the following bank layout:

  • CPU $8000-$BFFF: MMC3 banks effective in the $8000-$BFFF range but as if their bank register values were AND'd with $FD
  • CPU $C000-$FFFF: MMC3 banks effective in the $8000-$BFFF range but as if their bank register values were OR'd with $02

Similar Mappers

NES 2.0 Mapper 348 is similar but with the Outer Bank Register bits being arranged slightly differently.