Mask ROM pinout: Difference between revisions
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GND - |16 17| - CHR D3 | GND - |16 17| - CHR D3 | ||
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== Nintendo MMC5 PRG/CHR ROM pinouts - 128/256/512/1024 kBytes (32pin) == | |||
Slight variant of the pinout just above for MMC5 boards which supports up to 1MB of data. Both PRG and CHR ROMs are the same pinout, and even 128 KB PRG ROMs are 32-pin so they can have a VCC pin. | |||
---_--- | |||
A17 - |01 32| - +5V | |||
A18 - |02 31| - /CE (from MMC5 for PRG-ROMs, CHR A13 for CHR-ROMs) | |||
A15 - |03 30| - A19 | |||
A12 - |04 29| - A14 | |||
A7 - |05 28| - A13 | |||
A6 - |06 27| - A8 | |||
A5 - |07 26| - A9 | |||
A4 - |08 25| - A11 | |||
A3 - |09 24| - A16 | |||
A2 - |10 23| - A10 | |||
A1 - |11 22| - /OE (GND on PRG-ROMs, /RD on CHR-ROMs) | |||
A0 - |12 21| - D7 | |||
D0 - |13 20| - D6 | |||
D1 - |14 19| - D5 | |||
D2 - |15 18| - D4 | |||
GND - |16 17| - D3 | |||
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== Standard pinout - 128/256/512/1024 kBytes (32 pin) == | == Standard pinout - 128/256/512/1024 kBytes (32 pin) == |
Revision as of 10:09, 15 November 2010
Standard pinout PRG ROM - 16k / 32kB / 64kBytes (28pin)
This is the pinout Nintendo used for their PRGROMs, and it is compatible with EPROMs. For some unknown reasons, it was apparently required that unused adress lines on smaller ROMs were put to +5V, as Nintendo made different boards for each size (as opposed to place EPROMs of different sizes into the same slot). Some boards, such as CNROM, features solder pads in order to force those pins to +5V though.
---U--- +5V or A15 - |01 28| - +5V A12 - |02 27| - +5V or A14 A7 - |03 26| - A13 A6 - |04 25| - A8 A5 - |05 24| - A9 A4 - |06 23| - A11 A3 - |07 22| - /OE (/ROMSEL or mapper) A2 - |08 21| - A10 A1 - |09 20| - /CE (GND) A0 - |10 19| - D7 D0 - |11 18| - D6 D1 - |12 17| - D5 D2 - |13 16| - D4 GND - |14 15| - D3 -------
Nintendo pinout PRG ROM - 128/256/512KBytes (28/32pin)
This is the pinout Nintendo used for most of their boards. It differs with standard EPROMs, and only have one enable line. This system allows for multiple sizes of ROMs on the same board. 128 KB ROMs are only 28 pins, they are shuffled 2 pins down, starting from pin 3 to pin 30.
On boards where A18 is never used, pin 2 is connected with pin 22.
---_--- A17 - |01 32| - +5V A18 - |02 31| - +5V A15 - |03 30| - +5V A12 - |04 29| - A14 A7 - |05 28| - A13 A6 - |06 27| - A8 A5 - |07 26| - A9 A4 - |08 25| - A11 A3 - |09 24| - A16 A2 - |10 23| - A10 A1 - |11 22| - /CE (/ROMSEL or mapper) A0 - |12 21| - D7 D0 - |13 20| - D6 D1 - |14 19| - D5 D2 - |15 18| - D4 GND - |16 17| - D3 -------
Nintendo AOROM PRG ROM pinout - 128/256/KBytes (32pin)
Slight variant of the pinout above, where an additional enable line is used to prevent bus conflicts.
---_--- A17 - |01 32| - +5V (/ROMSEL) - |02 31| - CE (R/W) A15 - |03 30| - +5V A12 - |04 29| - A14 A7 - |05 28| - A13 A6 - |06 27| - A8 A5 - |07 26| - A9 A4 - |08 25| - A11 A3 - |09 24| - A16 A2 - |10 23| - A10 A1 - |11 22| - /CE (/ROMSEL) A0 - |12 21| - D7 D0 - |13 20| - D6 D1 - |14 19| - D5 D2 - |15 18| - D4 GND - |16 17| - D3 -------
CHR ROM - 8/16/32/64 KBytes (28pin)
This pinout is compatible with standard EPROMs, and is the same as for PRG ROM pinouts. However this time, unused address lines doesn't have to be put to +5V, and will be either NC (not connected) or +5V on boards where they are never used (where the mapper doesn't support larger ROMs)
---_--- CHR A15 (or +5V) - |01 28| - +5V CHR A12 - |02 27| - CHR A14 (or +5V) CHR A7 - |03 26| - CHR A13 (or NC) CHR A6 - |04 25| - CHR A8 CHR A5 - |05 24| - CHR A9 CHR A4 - |06 23| - CHR A11 CHR A3 - |07 22| - /OE (CHR /RD) CHR A2 - |08 21| - CHR A10 CHR A1 - |09 20| - /CE (CHR A13) CHR A0 - |10 19| - CHR D7 CHR D0 - |11 18| - CHR D6 CHR D1 - |12 17| - CHR D5 CHR D2 - |13 16| - CHR D4 GND - |14 15| - CHR D3 -------
CHR ROM - 128/256 KBytes (32pin)
This is the pinout Nintendo used for most of their boards. It differs with standard EPROMs, and with the Nintendo's PRG ROMs pinout. This system allows for multiple sizes of ROMs on the same board. Adress lines which are always unused on a board are put to +5V.
---_--- CHR A17 - |01 32| - +5V (CHR /RD) /OE - |02 31| - /CE (CHR A13) CHR A15 - |03 30| - +5V CHR A12 - |04 29| - CHR A14 CHR A7 - |05 28| - CHR A13 CHR A6 - |06 27| - CHR A8 CHR A5 - |07 26| - CHR A9 CHR A4 - |08 25| - CHR A11 CHR A3 - |09 24| - CHR A16 CHR A2 - |10 23| - CHR A10 CHR A1 - |11 22| - GND CHR A0 - |12 21| - CHR D7 CHR D0 - |13 20| - CHR D6 CHR D1 - |14 19| - CHR D5 CHR D2 - |15 18| - CHR D4 GND - |16 17| - CHR D3 -------
Nintendo MMC5 PRG/CHR ROM pinouts - 128/256/512/1024 kBytes (32pin)
Slight variant of the pinout just above for MMC5 boards which supports up to 1MB of data. Both PRG and CHR ROMs are the same pinout, and even 128 KB PRG ROMs are 32-pin so they can have a VCC pin.
---_--- A17 - |01 32| - +5V A18 - |02 31| - /CE (from MMC5 for PRG-ROMs, CHR A13 for CHR-ROMs) A15 - |03 30| - A19 A12 - |04 29| - A14 A7 - |05 28| - A13 A6 - |06 27| - A8 A5 - |07 26| - A9 A4 - |08 25| - A11 A3 - |09 24| - A16 A2 - |10 23| - A10 A1 - |11 22| - /OE (GND on PRG-ROMs, /RD on CHR-ROMs) A0 - |12 21| - D7 D0 - |13 20| - D6 D1 - |14 19| - D5 D2 - |15 18| - D4 GND - |16 17| - D3 -------
Standard pinout - 128/256/512/1024 kBytes (32 pin)
This is the standard pinouts for larger EPROMs. The vast majority (if not all) non-Nintendo made boards use those. In order to use a random EPROM in a Nintendo made board, it's necessary to compare this pinout and the pinout your board uses, and to cut traces/add wires to compensate for the differences. The name in parenthesis is for when the adress is unused (for smaller EPROMs).
---_--- A19 (or VPP) - |01 32| - VCC A16 - |02 31| - A18 (or PGM) A15 - |03 30| - A17 (or NC) A12 - |04 29| - A14 A7 - |05 28| - A13 A6 - |06 27| - A8 A5 - |07 26| - A9 A4 - |08 25| - A11 A3 - |09 24| - OE A2 - |10 23| - A10 A1 - |11 22| - CE A0 - |12 21| - D7 D0 - |13 20| - D6 D1 - |14 19| - D5 D2 - |15 18| - D4 GND - |16 17| - D3 -------