INES Mapper 153: Difference between revisions
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[[Category:iNES Mappers|153]][[Category:Mappers with cycle IRQs|153]][[Category:Mappers with CHR RAM|153]] | [[Category:iNES Mappers|153]][[Category:Mappers with cycle IRQs|153]][[Category:Mappers with CHR RAM|153]] | ||
iNES Mapper 153 is used for a Bandai '''FCG''' | iNES Mapper 153 is used for a Bandai '''FCG''' board with an LZ93D50 ASIC and 8192 bytes of battery-backed WRAM. These 8192 bytes must be denoted as PRG-NVRAM in the [[NES 2.0]] header using byte value $70. Only one game, ''Famicom Jump II: Saikyou no 7-nin'', uses this mapper. | ||
=Banks= | =Banks= |
Revision as of 06:51, 20 August 2018
iNES Mapper 153 is used for a Bandai FCG board with an LZ93D50 ASIC and 8192 bytes of battery-backed WRAM. These 8192 bytes must be denoted as PRG-NVRAM in the NES 2.0 header using byte value $70. Only one game, Famicom Jump II: Saikyou no 7-nin, uses this mapper.
Banks
- CPU $6000-$7FFF: 8 KiB battery-backed WRAM
- CPU $8000-$BFFF: 16 KiB switchable PRG-ROM bank
- CPU $C000-$FFFF: 16 KiB PRG ROM bank, fixed to the last bank
- PPU $0000-$1FFF: 8 KiB unbanked CHR-RAM
Registers
Outer PRG-ROM Bank Select ($8000-$8003 write)
Mask: $800F 7 bit 0 ---- ---- xxxx xxxP | +-- Select 256 KiB outer PRG-ROM bank at CPU $8000-$FFFF
- The same value must be written to all four registers, or the outer PRG-ROM bank would be switched as the PPU is rendering.
- Because the ASIC's PA12 and PA13 inputs are grounded, only registers $8000-$8003 instead of $8000-$8007 are relevant.
- No CHR banking is available.
Inner PRG-ROM Bank Select ($8008 write)
Mask: $800F 7 bit 0 ---- ---- .... PPPP |||| ++++-- Select 16 KiB inner PRG-ROM bank at CPU $8000-$BFFF
Nametable Mirroring Type Select ($8009 write)
Mask: $800F 7 bit 0 ---- ---- .... ..MM || ++-- Select nametable mirroring type 0: Vertical 1: Horizontal 2: One-screen, page 0 3: One-screen, page 1
IRQ Control ($800A write)
Mask: $800F 7 bit 0 ---- ---- .... ...C | +-- IRQ counter control 0: Counting disabled 1: Counting enabled
- Writing to this register acknowledges a pending IRQ, and copies the latch to the actual counter.
- If a write to this register enables counting while the counter is holding a value of zero, an IRQ is generated immediately.
IRQ Latch/Counter ($800B-$800C write)
Mask: $800F $C $B 7 bit 0 7 bit 0 ---- ---- ---- ---- CCCC CCCC CCCC CCCC |||| |||| |||| |||| ++++-++++--++++-++++-- Counter value (little-endian)
- If counting is enabled, the counter decreases on every M2 cycle. When it holds a value of zero, an IRQ is generated.
- These registers modify a latch that will only be copied to the actual counter when register $xxxA is written to.
PRG-RAM Control ($800D write)
Mask: $800F 7 bit 0 ---- ---- ..E. .... | +-------- PRG-RAM Chip Enable (1=Enable)
Note
When booting with WRAM filled with zeroes, Famicom Jump II will freeze with a black screen. Simply soft-resetting the console will then always run the game properly unless WRAM is zeroed out again.