INES Mapper 116: Difference between revisions

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These boards appear to have been researched by CaH4e3. They're used for some chinese games and bootlegs. He has described them in fceu-mm sources as:
iNES Mapper 116 is used for the SOMARI-P board bearing the '''Huang-1''' or '''Huang-2''' ASICs and a PAL, used by releases from Gouder, also known as 哥德 (Gēdé):
* '''Huang-1''' chip:
** ''A.V. 美少女戰士 Girl Fighting'' (A.V. Měi Shàonǚ Zhànshì)
** ''餓狼伝説 Special'' (Garō Densetsu Special, original Gouder release only)
** ''Kart Fighter''
** ''Somari the Adventurer'' (original Gouder and Kǎshèng releases)
* '''Huang-2''' chip:
** ''A.V. 究極麻將 II'' (A.V. Jiūjí Májiàng, original Gouder release only)


* SL12 Protected 3-in-1 mapper hardware (VRC2, MMC3, MMC1)
This mapper can simulate three different ASICs: the Nintendo [[MMC1]], [[MMC3]] and Konami [[VRC2]] (A0/A1, i.e. VRC2b). All three simulated chips have their separate registers, so that when switching between modes using the supervisor register, the entire mapper state changes including PRG/CHR ROM switchable and fixed banks as well as IRQ state.
* the same as 603-5052 board (TODO: add reading registers, merge)
* SL1632 2-in-1 protected board, similar to SL12 (TODO: find difference)


The following PCBs are listed as examples:
==Supervisor Register ($4100, write)==
Mask: $C100
D~7654 3210
  ---------
  .... .CMM
        |++- Mapper mode
        |    0: VRC2
        |    1: MMC3
        |    2: MMC1
        |    3: same as 2
        +--- Outer 256 KiB CHR-ROM bank (CHR A18)


* Garou Densetsu Special (G0904.PCB, Huang-1, GAL dip: W conf.)
==Notes==
* Kart Fighter (008, Huang-1, GAL dip: W conf.)
* The '''Huang-2''' chip differs from the '''Huang-1''' chip in that the MMC1 PRG-ROM bank registers are shifted by one bit to the left compared to what one would write to a normal MMC1, or to the Huang-1 in MMC1 mode. No submapper has been proposed yet for this behavior; in the meantime, the one game relying on this can be heuristically detected by having a PRG-ROM size of only 128 KiB, which is the maximum size available with said bit shift.
* Somari (008, C5052-13, GAL dip: P conf., GK2-P/GK2-V maskroms)
* When switching ''to'' MMC1 mode, the serial shift register is reset. ''Garō Densetsu Special'' relies on this. Supposedly, only the -W configuration of the PAL actually does this, though no game seems to be adversely affected by always emulating this behavior.
* Somari (008, Huang-1, GAL dip: W conf., GK1-P/GK1-V maskroms)
* The VRC2 CHR-ROM registers are initialized on power-up to $FF. The original release of ''Somari the Adventurer'' relies on this.
* AV Mei Shao Nv Zhan Shi ()
* ''Garō Densetsu Special'' relies on being able to write to write to [[Mirroring#Memory Mirroring|mirror]]s of $8xxx, $9xxx, and $Axxx in VRC2 mode.
* Samurai Spirits (Full version) (Huang-1, GAL dip: unk conf. GS-2A/GS-4A maskroms)
* The Kǎshèng rerelease of ''Garō Densetsu Special'' uses [[INES Mapper 187]] instead.
* Contra Fighter (603-5052 board, C5052-3, GAL dip: unk conf. SC603-A/SCB603-B maskroms)
[[Category:iNES Mappers|116]][[Category:MMC3-like mappers|116]][[Category:Mappers using $4020-$5FFF|116]][[Category:Mappers with scanline IRQs|116]][[Category:Mappers with cycle IRQs|116]]{{DEFAULTSORT:116}}


These documents were verified by implementation into bizhawk based solely on the fceu-mm sources. FCEUX also possesses fceu-mm's sources for this mapper.
==Similar mappers==
 
* [[INES Mapper 014]] and [[INES Mapper 238]] uses the same ASIC but with the PAL programmed differently to respond in other ways to other addresses.
This equipment is much simpler to operate than you might expect, considering that it is a combination of VRC2 + MMC3 + MMC1. The supervisor register controls which mapper's address and IRQ outputs and write enable inputs are enabled:
 
  Range,Mask:  $4100-7FFF, $4100
    $4100:  [.... .CMM]
      MM = Mapper mode
          %00 = [[VRC2]]b
          %01 = [[MMC3]]
          %10, %11 = [[MMC1]]
      C = 256K CHR ROM base (AV Girl Fighting uses this)
 
This control register supposedly occupies the WRAM address range, so there can be no WRAM. However, it only answers to $41xx.
 
The Mapper mode bits control which of the mapper circuits are connected to the NES. All of the PRG-based registers and IRQ signals are connected or disconnected accordingly. This means that in order to configure one of the mapper circuits, it must be connected.
 
The VRC2 is wired as a [[VRC2]]b.
Though Konami games using VRC mappers write to only the canonical address of each port, games using this mapper such as ''Garou Densetsu Special'' tend to rely on being able to write to [[Mirroring#Memory Mirroring|mirror]]s of $8xxx, $9xxx, and $Axxx.
And ''SOMARI-W'' depends on the CHR bank registers being $FF at power on.
 
The MMC3 acts exactly as a stock TxROM. It has not been determined which MMC3 variant this MMC3 is acting as. Fceu-mm makes it seem as if the mmc3 CHR regs must be initialized at power-on in a certain pattern; it is unknown why this would be important.
 
The MMC1 acts exactly as a stock SxROM. Fceu-mm contained "hacky hacky" logic to do a reset of sorts on the MMC1 whenever the low bit of $41xx's address was set, claiming it was necessary for SOMARI-W.
 
The C bit of the m116's control reg controls CHR ROM A18, which provides a CHR ROM base offset for the VRC2 and MMC3 modes. Whether and how this applies to the MMC1 mode has not been tested.
 
[[Category:iNES Mappers|116]][[Category:MMC3-like mappers|116]][[Category:Mappers using $4020-$5FFF|116]]

Revision as of 16:37, 15 September 2018

iNES Mapper 116 is used for the SOMARI-P board bearing the Huang-1 or Huang-2 ASICs and a PAL, used by releases from Gouder, also known as 哥德 (Gēdé):

  • Huang-1 chip:
    • A.V. 美少女戰士 Girl Fighting (A.V. Měi Shàonǚ Zhànshì)
    • 餓狼伝説 Special (Garō Densetsu Special, original Gouder release only)
    • Kart Fighter
    • Somari the Adventurer (original Gouder and Kǎshèng releases)
  • Huang-2 chip:
    • A.V. 究極麻將 II (A.V. Jiūjí Májiàng, original Gouder release only)

This mapper can simulate three different ASICs: the Nintendo MMC1, MMC3 and Konami VRC2 (A0/A1, i.e. VRC2b). All three simulated chips have their separate registers, so that when switching between modes using the supervisor register, the entire mapper state changes including PRG/CHR ROM switchable and fixed banks as well as IRQ state.

Supervisor Register ($4100, write)

Mask: $C100

D~7654 3210
  ---------
  .... .CMM
        |++- Mapper mode
        |     0: VRC2
        |     1: MMC3
        |     2: MMC1
        |     3: same as 2
        +--- Outer 256 KiB CHR-ROM bank (CHR A18)

Notes

  • The Huang-2 chip differs from the Huang-1 chip in that the MMC1 PRG-ROM bank registers are shifted by one bit to the left compared to what one would write to a normal MMC1, or to the Huang-1 in MMC1 mode. No submapper has been proposed yet for this behavior; in the meantime, the one game relying on this can be heuristically detected by having a PRG-ROM size of only 128 KiB, which is the maximum size available with said bit shift.
  • When switching to MMC1 mode, the serial shift register is reset. Garō Densetsu Special relies on this. Supposedly, only the -W configuration of the PAL actually does this, though no game seems to be adversely affected by always emulating this behavior.
  • The VRC2 CHR-ROM registers are initialized on power-up to $FF. The original release of Somari the Adventurer relies on this.
  • Garō Densetsu Special relies on being able to write to write to mirrors of $8xxx, $9xxx, and $Axxx in VRC2 mode.
  • The Kǎshèng rerelease of Garō Densetsu Special uses INES Mapper 187 instead.

Similar mappers

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