INES Mapper 015: Difference between revisions

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[[Category:iNES Mappers|015]] [[Category:Multicart mappers|015]]
{{DEFAULTSORT:015}}[[Category:iNES Mappers]][[Category:Multicart mappers]][[Category:Mappers with CHR RAM]]
'''iNES Mapper 015''' denotes the '''K-1029''' circuit board, used for the ''100-in-1 Contra Function 16'' and ''168-in-1 New Contra Function 16'' multicarts.
=Banks=
* CPU $8000-$FFFF: Switchable PRG-ROM banks (8/16/32 KiB)
* PPU $0000-$1FFF: Unbanked 8 KiB of CHR-RAM that can be write-protected
* Nametable mirroring: Switchable horizontal/vertical settings


The [[iNES]] format assigns '''iNES Mapper 015''' as the mapper used in ''100-in-1 Contra Function 16'', the first pirate multicart to be emulated.
=Address and Data Latch ($8000-$FFFF, write)=
 
Mask: $8000
The mapper allows multiple [[NROM]] or [[BNROM]] games plus one [[UNROM]] game to be used with very little modification. A few games originally released on a [[CNROM]] compatible board (such as two variants of ''Tetris'') showed up on the cart; these were ripped to NROM by tossing out all 8 KB CHR banks except the one used for gameplay.
 
== Overview ==
* PRG ROM size: Up to 1MB
* PRG ROM bank size: 8 KB, 16 KB, or 32 KB
* PRG RAM: 8 KB
* CHR capacity: 8 KB RAM [[Category:Mappers with CHR RAM|015]]
* CHR bank size: None
* Nametable [[mirroring]]: Controlled by mapper
* Subject to [[bus conflict]]s: No
== Banks ==
There is one switchable bank. How this is mapped into depends on the current bank mode (see [[#Registers|Registers below]]).
 
=== Bank mode 0 ( 32K ) ===
 
*CPU $8000-$BFFF: Bank B
*CPU $C000-$FFFF: Bank (B bitwise ORed with 1)
 
If bit 0 of B equals 1, then the 16K and 32K modes are identical.
 
=== Bank mode 1 ( 128K ) ===
 
*CPU $8000-$BFFF: Switchable 16 KB bank B
*CPU $C000-$DFFF: <strike>Fixed to last bank in the cart</strike> Krzysiobal's reverse-engineered schematic says that this is <tt>B OR 7</tt>, and so supports multiple 128KiB UNROM games in one cart.
 
This mode uses the same configuration as [[UNROM]].
 
=== Bank mode 2 ( 8K ) ===
 
*CPU $8000-$9FFF: Sub-bank b of 16 KB PRG ROM bank B
*CPU $A000-$FFFF: Mirrors of $8000-$9FFF
 
=== Bank mode 3 ( 16K ) ===
 
*CPU $8000-$BFFF: 16 KB bank B
*CPU $C000-$FFFF: Mirror of $8000-$BFFF
 
== Registers ==
=== Control ($8000-$FFFF) ===
This is a 10-bit register. The upper 2 bits of the value are set from address lines A1-A0.
 
15 bit  8 7  bit  0  Address bus
---- ---- ---- ----
1xxx xxxx xxxx xxSS
|                ||
|                ++- Select PRG ROM bank mode
|                    0: 32K; 1: 128K (UNROM style); 2: 8K; 3: 16K
+------------------- Always 1
   
   
  7 bit  0  Data bus
  A~FEDC BA98 7654 3210 D~7654 3210
---- ----
  -------------------    ---------
bMBB BBBB
  1... .... .... ..SS    pMPP PPPP
|||| ||||
                    ||   ||++-++++- PRG A14..A19
||++-++++- Select 16 KB PRG ROM bank
                    ||    |+-------- Nametable mirroring
|+-------- Select nametable mirroring mode (0=vertical; 1=horizontal)
                    ||    |          0: Vertical
+--------- Select 8 KB half of 16 KB PRG ROM bank
                    ||    |          1: Horizontal
            (should be 0 except in 8K bank mode)
                    ||    +--------- PRG A13 if SS=2, ignored otherwise
 
                    ++-------------- PRG banking mode
The result when b=1 outside of 8K bank mode is not specified.
                                      0: NROM-256 (PRG A14=CPU A14)
Some emulators (fceux, virtuanesex) are XORing the b (8KB half) bit frequently instead of ORing or ignoring.
                                      1: UNROM    (PRG A14..16=111 when CPU A14=1)
Krzysiobal's reverse-engineered schematic below states that the b bit is completely ignored except in mode 2.
                                      2: NROM-64  (PRG A13=p)
 
                                      3: NROM-128
All ten bits of this register are cleared on reset. This causes the first 32K to be mapped and mirroring to be vertical (PPUA10).
Power-on value: All bits clear
 
CHR-RAM is write-protected in PRG banking modes 0 and 3, and write-enabled in modes 1 and 2.
Krzysiobal's reverse-engineered schematic says that the CHR-RAM is write-protected when PRG mode is 0 or 3. It's unknown if there's another version of the same hardware with different behavior.
=Use for mapper hacks=
 
The only known two cartridges using this mapper are the two listed multicarts. All other known ROM files claiming to use mapper 15 have been identified as being mapper hacks, usually from mappers [[INES Mapper 164|164]] and [[INES Mapper 227|227]]. To run these mapper-hacked games, emulators must not enforce CHR-RAM write-protection even though an actual K-1029 PCB would, and must provide 8 KiB of PRG-RAM at CPU $6000-$7FFF even though an actual K-1029 PCB would not.
The unlicensed chinese WXN game [[wikia:c:bootleggames:Bio Hazard (Famicom)|Bio Hazard]] exists as two ROM images: one for Mapper 15, and one for [[INES Mapper 227]]. The Mapper 227 version runs without problems in emulators that support that mapper, while the Mapper 15 version will freeze at some point during gameplay. A comparison of the two ROM image indicates that the Mapper 227 version is the original version, while the Mapper 15 version is a hack that replaces the original bankswitching code at offset $0 of every 32 KiB bank; since the replacement code is shorter (only 17 bytes) than the original code (32 bytes), remnants of the now-unreachable original code are still visible from offset $11-$1F in every 32 KiB bank, thus revealing the Mapper 15 version as a mapper hack.


== See also ==
==See also==
*[http://www.romhacking.net/documents/362/ NES Mapper List] by Disch
*[http://nesdev.org/mappers.zip Comprehensive NES Mapper Document] by \Firebug\
*[https://forums.nesdev.org/viewtopic.php?p=192828#p192828 schematic RE'd] by krzysiobal
*[https://forums.nesdev.org/viewtopic.php?p=192828#p192828 schematic RE'd] by krzysiobal

Revision as of 13:12, 2 November 2019

iNES Mapper 015 denotes the K-1029 circuit board, used for the 100-in-1 Contra Function 16 and 168-in-1 New Contra Function 16 multicarts.

Banks

  • CPU $8000-$FFFF: Switchable PRG-ROM banks (8/16/32 KiB)
  • PPU $0000-$1FFF: Unbanked 8 KiB of CHR-RAM that can be write-protected
  • Nametable mirroring: Switchable horizontal/vertical settings

Address and Data Latch ($8000-$FFFF, write)

Mask: $8000

A~FEDC BA98 7654 3210  D~7654 3210
  -------------------    ---------
  1... .... .... ..SS    pMPP PPPP
                   ||    ||++-++++- PRG A14..A19
                   ||    |+-------- Nametable mirroring
                   ||    |           0: Vertical
                   ||    |           1: Horizontal
                   ||    +--------- PRG A13 if SS=2, ignored otherwise
                   ++-------------- PRG banking mode
                                     0: NROM-256 (PRG A14=CPU A14)
                                     1: UNROM    (PRG A14..16=111 when CPU A14=1)
                                     2: NROM-64  (PRG A13=p)
                                     3: NROM-128
Power-on value: All bits clear

CHR-RAM is write-protected in PRG banking modes 0 and 3, and write-enabled in modes 1 and 2.

Use for mapper hacks

The only known two cartridges using this mapper are the two listed multicarts. All other known ROM files claiming to use mapper 15 have been identified as being mapper hacks, usually from mappers 164 and 227. To run these mapper-hacked games, emulators must not enforce CHR-RAM write-protection even though an actual K-1029 PCB would, and must provide 8 KiB of PRG-RAM at CPU $6000-$7FFF even though an actual K-1029 PCB would not.

See also

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