NES 2.0 Mapper 380: Difference between revisions

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(Rewrite to follow mapper 227's format, add UOROM mode)
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{{DEFAULTSORT:380}}[[Category:Multicart mappers]][[Category:Mappers with CHR RAM]]
{{DEFAULTSORT:380}}[[Category:Multicart mappers]][[Category:Mappers with CHR RAM]]
'''NES 2.0 Mapper 380''' denotes the '''970630C''' circuit board, used on a 512 KiB multicart having 42 to 80,000 listed NROM and UNROM games.
'''NES 2.0 Mapper 380''' denotes the '''970630C''' (submapper 0) and '''KN-35A''' (submapper 1) multicart circuit board mounting 256-512 KiB of PRG-ROM plus 8 KiB of unbanked CHR-RAM.


==Outer Bank register ($8000-$FFFF, write)==
==Address Latch ($8000-$FFFF, write)==
  Mask: $8000
  [A~1... ..Om CRQP PpMS]
          || |||| |||+-0: PRG A14=p
A~FEDC BA98 7654 3210
           || |||| |||  1: PRG A14=CPU A14
  -------------------
           || |||| ||+- 0: Vertical mirroring
  1... ..UD .bbb bbMV
           || |||| ||  1: Horizontal mirroring
          +|--||| |||+- UV  PRG banking mode
           || |+++-++-- PRG A18..A14
           | ||| |||   10: NROM-256
          || +-------- 0: CHR-RAM writeable
           | ||| |||   11: NROM-128
          ||          1: CHR-RAM write-protected
           | ||| |||  0x: UNROM-like
           |+---------- '''Submapper 0''':
           |  ||| ||+-- 0: Vertical, 1: Horizontal Mirroring
          |            0: PRG A3..A0=CPU A3..A0
           | +++-++--- PRG A14..A18.
          |            1: PRG A3..A0=Solder pad 3-0
           |            PRG A14 replaced with CPU A14 in NROM-256 mode.
           |            '''Submapper 1''':
           |            PRG A14..A16 replaced with 7 if CPU A14=1 in UNROM-like mode.
          |            0: PRG A17=Q if CPU A14=1
           +----------- 0: PRG-ROM enabled
           |            1: PRG A17=1 if CPU A14=1 (UOROM)
                        1: PRG-ROM disabled, reading from $8000-$FFFF returns solder pad value
           +----------- 0: When CPU A14=1: PRG A16..14=111 (UNROM)
There is no UNROM-like data latch; all games modified to use the address latch.
                        1: When CPU A14=1: PRG A16..14=PPp
==Solder Pad ($8000-$FFFF, read)==
Power-on value: 0
Mask: $8000
D~7654 3210
  ---------
  .... VVVV
        ++++- Solder pad value


Only active when the address latch's A8 was previously set to 1. There are sixteen different menus with basically the same games but a different amount of repeats.
Effective meaning:
Bit 9  Bit 8  Bit 0  Meaning
$200s  $100s  $001s
  (O)    (m)    (S)
  0      0      0    Switchable inner 16 KiB bank PPp at CPU $8000-$BFFF, fixed inner bank #7 at CPU $C000-$FFFF (UNROM)
  0      0      1    Switchable inner 16 KIB bank PP0 at CPU $8000-$BFFF, fixed inner bank #7 at CPU $C000-$FFFF (UNROM with only even banks reachable, pointless)
  0      1      0    Switchable inner 16 KiB bank QPPp at CPU $8000-$BFFF, fixed inner bank #15 at CPU $C000-$FFFF (UOROM, submapper 1 only)
  0      1      1    Switchable inner 16 KIB bank QPP0 at CPU $8000-$BFFF, fixed inner bank #15 at CPU $C000-$FFFF (UOROM with only even banks reachable, pointless, submapper 1 only)
  1      ?      0    Switchable 16 KiB inner bank PPp at CPU $8000-$BFFF, mirrored at CPU $C000-$FFFF (NROM-128)
  1      ?      1    Switchable 32 KiB inner bank PP at CPU $8000-$FFFF (NROM-256)
 
* When the ''m'' bit is set, PRG A3-A0 are replaced with the values of four solder pads, which when the menu code reads particular ROM locations effectively selects one of up to 16 menus with different game counts (submapper 0 only).
* Because all bits are cleared on reset, CPU $8000-$BFFF is set to 16 KiB bank #0, and $C000-$FFFF is set to 16 KiB bank #7 on reset.

Revision as of 19:31, 19 November 2021

NES 2.0 Mapper 380 denotes the 970630C (submapper 0) and KN-35A (submapper 1) multicart circuit board mounting 256-512 KiB of PRG-ROM plus 8 KiB of unbanked CHR-RAM.

Address Latch ($8000-$FFFF, write)

[A~1... ..Om CRQP PpMS]
          || |||| |||+-0: PRG A14=p
          || |||| |||  1: PRG A14=CPU A14
          || |||| ||+- 0: Vertical mirroring
          || |||| ||   1: Horizontal mirroring
          || |+++-++-- PRG A18..A14
          || +-------- 0: CHR-RAM writeable
          ||           1: CHR-RAM write-protected
          |+---------- Submapper 0:
          |            0: PRG A3..A0=CPU A3..A0
          |            1: PRG A3..A0=Solder pad 3-0
          |            Submapper 1:
          |            0: PRG A17=Q if CPU A14=1
          |            1: PRG A17=1 if CPU A14=1 (UOROM)
          +----------- 0: When CPU A14=1: PRG A16..14=111 (UNROM)
                       1: When CPU A14=1: PRG A16..14=PPp
Power-on value: 0

Effective meaning: 

Bit 9   Bit 8   Bit 0   Meaning
$200s   $100s   $001s
 (O)     (m)     (S)
  0       0       0     Switchable inner 16 KiB bank PPp at CPU $8000-$BFFF, fixed inner bank #7 at CPU $C000-$FFFF (UNROM)
  0       0       1     Switchable inner 16 KIB bank PP0 at CPU $8000-$BFFF, fixed inner bank #7 at CPU $C000-$FFFF (UNROM with only even banks reachable, pointless)
  0       1       0     Switchable inner 16 KiB bank QPPp at CPU $8000-$BFFF, fixed inner bank #15 at CPU $C000-$FFFF (UOROM, submapper 1 only)
  0       1       1     Switchable inner 16 KIB bank QPP0 at CPU $8000-$BFFF, fixed inner bank #15 at CPU $C000-$FFFF (UOROM with only even banks reachable, pointless, submapper 1 only)
  1       ?       0     Switchable 16 KiB inner bank PPp at CPU $8000-$BFFF, mirrored at CPU $C000-$FFFF (NROM-128)
  1       ?       1     Switchable 32 KiB inner bank PP at CPU $8000-$FFFF (NROM-256)
  • When the m bit is set, PRG A3-A0 are replaced with the values of four solder pads, which when the menu code reads particular ROM locations effectively selects one of up to 16 menus with different game counts (submapper 0 only).
  • Because all bits are cleared on reset, CPU $8000-$BFFF is set to 16 KiB bank #0, and $C000-$FFFF is set to 16 KiB bank #7 on reset.
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