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| | Winning isn't fun. It is game over. |
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| See my [http://en.wikipedia.org/wiki/User:Ben_Boldt Wikipedia User Page]. | | See my [http://en.wikipedia.org/wiki/User:Ben_Boldt Wikipedia User Page]. |
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| MMC6 ASCII Pinout (sandbox/in progress):
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| ___
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| / \
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| / \
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| (n) CPU A13 -> / 1 64 \ -> PRG A17 (r)
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| M2 -> / 2 63 \ <- CPU A14 (n)
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| (unknown, GND) -> / 3 O 62 \ -> PRG A18 (r)
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| n/c -- / 4 61 \ -> PRG A14 (r)
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| n/c -- / 5 60 \ -> PRG A15 (r)
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| /M2 <- / 6 59 \ -> PRG A13 (r)
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| (unknown, GND) -> / 7 58 \ <- CPU A12 (nr)
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| (unknown, 5V) -> / 8 57 \ -- GND
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| (unknown, 5V) -> / 9 56 \ -- VCC/batt
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| VCC/batt -- / 10 55 \ <- CPU A8 (nr)
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| GND -- / 11 ( ) 54 \ <- CPU A7 (nr)
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| (unknown, 5V) -> / 12 53 \ <- CPU A9 (nr)
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| 3.3V Core Bias -- / 13 52 \ <- CPU A6 (nr)
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| (n) PPU A10 -> / 14 51 \ <- CPU A5 (nr)
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| (n) PPU A11 -> / 15 50 \ -> PRG A16 (r) Orientation:
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| PPU A13 <- / 16 49 \ <- CPU A4 (nr) --------------------
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| / Nintendo MMC6 \ 48 33
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| \ Package QFP-64, 0.8mm pitch / | |
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| (r) CHR A10 <- \ 17 48 / <- CPU A3 (nr) .------------.
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| (r) CHR A16 <- \ 18 47 / -> PRG /CE (r) 49-| |-32
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| (r) CHR A11 <- \ 19 46 / <- CPU A2 (nr) | Nintendo |
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| (n) PPU A12 -> \ 20 45 / <> CPU D7 (nr) |O MMC6B O|
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| (r) CHR A13 <- \ 21 ( ) 44 / <- CPU A1 (nr) | |
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| (r) CHR A12 <- \ 22 43 / <> CPU D6 (nr) 64-|o |-17
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| (r) CHR A14 <- \ 23 42 / <- CPU A0 (nr) \------------'
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| GND -- \ 24 41 / <> CPU D5 (nr) | |
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| VCC/batt -- \ 25 40 / <> CPU D0 (nr) 1 16
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| (r) CHR A15 <- \ 26 39 / <> CPU D4 (nr)
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| (n) CIRAM A10 <- \ 27 38 / -- VCC/batt Legend:
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| (nr) CHR /OE, PPU /RD -> \ 28 37 / -- GND ------------------------------
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| (nr) CHR /CE, PPU A13 -> \ 29 36 / <> CPU D1 (nr) --[MMC6]-- Power
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| (r) CHR A17 <- \ 30 35 / <> CPU D3 (nr) ->[MMC6]<- MMC6 input
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| (n) /IRQ <- \ 31 34 / <> CPU D2 (nr) <-[MMC6]-> MMC6 output
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| (n) /ROMSEL -> \ 32 33 / <- CPU R/W (n) <>[MMC6]<> Bidirectional
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| \ / ??[MMC6]?? Unknown
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| \ / n NES connection
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| \ / r ROM chip connection
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| V R RAM chip connection
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| * GND pins (11,24,37,57) are internally connected to each other.
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| * VCC/batt pins (10,25,38,56) are internally connected to each other.
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| * All pins have internal protection diodes from GND and to VCC/batt except pins 4 and 5.
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| * Pins 4 and 5 measure infinite resistance to all other pins.
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| * Unknown input pins (3,7,8,9,12) are labeled as connected on NES HK-ROM PCB.
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| Battery Circuit from NES HK-ROM PCB:
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| +------|>|----/\/\/------+------|<|-----O NES 5V
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| + | 1 kohm |
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| --- 3V |
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| ----- Lithium +--------------O MMC6 VCC/Batt
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| | 2032
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| - |
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| +---------------------------------------O NES GND, MMC6 GND
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| 3.3V Core Bias Circuit from NES HK-ROM PCB:
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| NES 5V O----/\/\/----+
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| 181 ohm |
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| +-----O MMC6 3.3V Core Bias
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| 470 ohm |
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| NES GND, MMC6 GND O----/\/\/----+
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| NES-HKROM (Startropics 1) BOM:
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| R1 1 kohm
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| R2 181 ohm
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| R3 470 ohm
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| C1 22uF 6.3V Electrolytic
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| C2 10nF Ceramic
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| C3 10nF Ceramic
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| D1 Diode (0.6V Forward)
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| D2 Diode (0.6V Forward)
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| U1 PRG-ROM
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| U2 CHR-ROM
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| U3 CIC
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| U4 MMC6
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| Batt 2032 3V Lithium
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