Talk:APU Noise: Difference between revisions
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Curiously, the noise channel's frequency counter [http://uxul.org/~noname/chips/cpu-2/no-metal/stitched/final/ on the die] isn't an ordinary counter - it's an '''11-bit linear feedback shift register''' (with taps at the 9th and 11th bits); when I take the counter values from the on-die ROM and run the LFSR until the result is '10000000000', the cycle counts (for NTSC) match | Curiously, the noise channel's frequency counter [http://uxul.org/~noname/chips/cpu-2/no-metal/stitched/final/ on the die] isn't an ordinary counter - it's an '''11-bit linear feedback shift register''' (with taps at the 9th and 11th bits); when I take the counter values from the on-die ROM and run the LFSR until the result is '10000000000', the cycle counts (for NTSC) match once multiplied by 2 (note that this means the PAL frequency for $1 is almost definitely wrong). --[[User:Quietust|Quietust]] 04:58, 23 January 2011 (UTC) | ||
Revision as of 00:16, 24 January 2011
Curiously, the noise channel's frequency counter on the die isn't an ordinary counter - it's an 11-bit linear feedback shift register (with taps at the 9th and 11th bits); when I take the counter values from the on-die ROM and run the LFSR until the result is '10000000000', the cycle counts (for NTSC) match once multiplied by 2 (note that this means the PAL frequency for $1 is almost definitely wrong). --Quietust 04:58, 23 January 2011 (UTC)
