Talk:6264 static RAM: Difference between revisions
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62256 is identical except for the !CS2 input and NC becoming address lines. This is to make address expansion of a board design almost trivial using inverters as half of an address decoder (other half is !CS input). | 62256 is identical except for the !CS2 input and NC becoming address lines. This is to make address expansion of a board design almost trivial using inverters as half of an address decoder (other half is !CS input). | ||
CY62256 SRAM (28 pins, 1-14,28-15) Note that the Ax and Dx line order doesn't really matter. | CY62256 SRAM (28 pins, 1-14,28-15) Note that the Ax and Dx line order doesn't really matter. | ||
A5 +5V | A5 +5V<br> | ||
A6 !WE | A6 !WE<br> | ||
A7 A4 | A7 A4<br> | ||
A8 A3 | A8 A3<br> | ||
A9 A2 | A9 A2<br> | ||
A10 A1 | A10 A1<br> | ||
A11 !OE | A11 !OE<br> | ||
A12 A0 | A12 A0<br> | ||
A13 !CS | A13 !CS<br> | ||
A14 D7 | A14 D7<br> | ||
D0 D6 | D0 D6<br> | ||
D1 D5 | D1 D5<br> | ||
D2 D4 | D2 D4<br> | ||
Gnd D3 | Gnd D3<br> | ||
62512 SRAM (32 pins, 1-16, 32-17) | 62512 SRAM (32 pins, 1-16, 32-17) | ||
A18 +5V | A18 +5V<br> | ||
A16 A15 | A16 A15<br> | ||
A14 A17 | A14 A17<br> | ||
A12 /WE | A12 /WE<br> | ||
A7 A13 | A7 A13<br> | ||
A6 A8 | A6 A8<br> | ||
A5 A9 | A5 A9<br> | ||
A4 A11 | A4 A11<br> | ||
A3 /OE | A3 /OE<br> | ||
A2 A10 | A2 A10<br> | ||
A1 /CS | A1 /CS<br> | ||
A0 D7 | A0 D7<br> | ||
D0 D6 | D0 D6<br> | ||
D1 D5 | D1 D5<br> | ||
D2 D4 | D2 D4<br> | ||
Gnd D3 | Gnd D3<br> | ||
621024 SRAM (32 pins, 1-16, 32-17) | 621024 SRAM (32 pins, 1-16, 32-17) | ||
Revision as of 16:43, 30 August 2014
More pinouts for different sizes of 62* SRAM's
Some extra pinouts for SRAMs:
62256 is identical except for the !CS2 input and NC becoming address lines. This is to make address expansion of a board design almost trivial using inverters as half of an address decoder (other half is !CS input).
CY62256 SRAM (28 pins, 1-14,28-15) Note that the Ax and Dx line order doesn't really matter.
A5 +5V
A6 !WE
A7 A4
A8 A3
A9 A2
A10 A1
A11 !OE
A12 A0
A13 !CS
A14 D7
D0 D6
D1 D5
D2 D4
Gnd D3
62512 SRAM (32 pins, 1-16, 32-17)
A18 +5V
A16 A15
A14 A17
A12 /WE
A7 A13
A6 A8
A5 A9
A4 A11
A3 /OE
A2 A10
A1 /CS
A0 D7
D0 D6
D1 D5
D2 D4
Gnd D3
621024 SRAM (32 pins, 1-16, 32-17) NC +5V A16 A15 A14 CS2 A12 /WE A7 A13 A6 A8 A5 A9 A4 A11 A3 /OE A2 A10 A1 /CS1 A0 D7 D0 D6 D1 D5 D2 D4 Gnd D3
These would need to be edited to match [s]style and[/s][i]done[/i] format of the existing Wiki article. They're based on the
