VRC2: Difference between revisions
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== Overview == | == Overview == | ||
* PRG ROM bank size: 8 KB at $8000, and $A000 | * PRG ROM bank size: 8 KB at $8000, and $A000 | ||
* PRG RAM: Unknown (none?) | * PRG RAM: Unknown (none?) |
Revision as of 09:21, 13 June 2009
The Konami VRC2 is an ASIC mapper.
Overview
- PRG ROM bank size: 8 KB at $8000, and $A000
- PRG RAM: Unknown (none?)
- CHR bank size: 1 KB
- Nametable mirroring: Controlled by mapper
- Subject to bus conflicts: No
The Konami VRC2 is almost identical to the VRC4, but a bit more limited.
Revisions
This mapper had two known revisions: VRC2a and VRC2b. Both revisions uses Address lines A0, A1, and A12-A15 for registers, however VRC2a has A0 and A1 "backwards" from the norm. Address $x001 on VRC2b would be $x002 on VRC2a, and $x002 on VRC2b would be $x001 on VRC2a.
Additionally, VRC2a has 7-bit wide CHR registers, whereas VRC2b has 8-bit wide CHR registers.
This page lists registers as they are in the VRC2b variant. For VRC2a registers, reverse A0 and A1 lines.
Registers
PRG Select 0 ($8000, $8001, $8002, $8003)
7 bit 0 --------- .... PPPP |||| ++++- Select 8 KB PRG bank at $8000
PRG Select 1 ($A000, $A001, $A002, $A003)
7 bit 0 --------- .... PPPP |||| ++++- Select 8 KB PRG bank at $A000
Mirroring Control ($9000, $9001, $9002, $9003)
7 bit 0 --------- .... ..MM || ++- Mirroring (0: vertical; 1: horizontal; 2: one-screen, lower bank; 3: one-screen, upper bank;)
CHR Select 0 ($B000 + $B001)
$B000 $B001 7 bit 0 7 bit 0 --------- --------- .... LLLL .... HHHH |||| |||| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0000 ++++-------------- Low 4-bits
Note: On VRC2a, the low bit is ignored (right shift value by 1)
CHR Select 1 ($B002 + $B003)
$B002 $B003 7 bit 0 7 bit 0 --------- --------- .... LLLL .... HHHH |||| |||| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0400 ++++-------------- Low 4-bits
Note: On VRC2a, the low bit is ignored (right shift value by 1)
CHR Select 2 ($C000 + $C001)
$C000 $C001 7 bit 0 7 bit 0 --------- --------- .... LLLL .... HHHH |||| |||| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0800 ++++-------------- Low 4-bits
Note: On VRC2a, the low bit is ignored (right shift value by 1)
CHR Select 3 ($C002 + $C003)
$C002 $C003 7 bit 0 7 bit 0 --------- --------- .... LLLL .... HHHH |||| |||| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0C00 ++++-------------- Low 4-bits
Note: On VRC2a, the low bit is ignored (right shift value by 1)
CHR Select 4 ($D000 + $D001)
$D000 $D001 7 bit 0 7 bit 0 --------- --------- .... LLLL .... HHHH |||| |||| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1000 ++++-------------- Low 4-bits
Note: On VRC2a, the low bit is ignored (right shift value by 1)
CHR Select 5 ($D002 + $D003)
$D002 $D003 7 bit 0 7 bit 0 --------- --------- .... LLLL .... HHHH |||| |||| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1400 ++++-------------- Low 4-bits
Note: On VRC2a, the low bit is ignored (right shift value by 1)
CHR Select 6 ($E000 + $E001)
$E000 $E001 7 bit 0 7 bit 0 --------- --------- .... LLLL .... HHHH |||| |||| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1800 ++++-------------- Low 4-bits
Note: On VRC2a, the low bit is ignored (right shift value by 1)
CHR Select 7 ($E002 + $E003)
$E002 $E003 7 bit 0 7 bit 0 --------- --------- .... LLLL .... HHHH |||| |||| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1C00 ++++-------------- Low 4-bits
Note: On VRC2a, the low bit is ignored (right shift value by 1)