TEROM: Difference between revisions
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== Solder Pad Config == | == Solder Pad Config == | ||
* Normal mode : 'CL1' connected, 'CL2' connected, 'H' disconnected, 'V' disconnected. | * Normal mode : 'CL1' connected, 'CL2' connected, 'H' disconnected, 'V' disconnected. | ||
* [[DEROM]] backward | * [[DEROM]] backward compatibility mode with Horizontal mirroring : 'CL1' disconnected, 'CL2' disconnected, 'H' disconnected, 'V' connected. | ||
* [[DEROM]] backward | * [[DEROM]] backward compatibility mode with Vertical mirroring : 'CL1' disconnected, 'CL2' disconnected, 'H' connected, 'V' disconnected. | ||
Note : In DEROM backward compatibility mode, mirroring is hardwired and IRQs are disabled. However, the additionnal bankswitching modes available by the MMC3 that weren't available with the 109 chip used on DEROM boards are still present. | Note : In DEROM backward compatibility mode, mirroring is hardwired and IRQs are disabled. However, the additionnal bankswitching modes available by the MMC3 that weren't available with the 109 chip used on DEROM boards are still present. | ||
Revision as of 14:35, 12 June 2009
TEROM (NES-TEROM and HVC-TEROM) is a common board within the TxROM set. Like other TxROM boards, TEROM uses the Nintendo MMC3 ASIC.
Overview
- PRG ROM size: 32 KB
- PRG ROM bank size: 8 KB
- PRG RAM: None
- CHR capacity: 8, 16, 32, 64 KB ROM
- CHR bank size: 1 KB and 2 KB
- Nametable mirroring: Solder pads select horizontal, vertical or controlled by mapper.
- Subject to bus conflicts: No
Banks
- CPU $8000-$9FFF (or $C000-$DFFF): 8 KB switchable PRG ROM bank
- CPU $A000-$BFFF: 8 KB switchable PRG ROM bank
- CPU $C000-$DFFF (or $8000-$9FFF): 8 KB PRG ROM bank, fixed to the second-last bank
- CPU $E000-$FFFF: 8 KB PRG ROM bank, fixed to the last bank
- PPU $0000-$07FF (or $1000-$17FF): 2 KB switchable CHR bank
- PPU $0800-$0FFF (or $1800-$1FFF): 2 KB switchable CHR bank
- PPU $1000-$13FF (or $0000-$03FF): 1 KB switchable CHR bank
- PPU $1400-$17FF (or $0400-$07FF): 1 KB switchable CHR bank
- PPU $1800-$1BFF (or $0800-$0BFF): 1 KB switchable CHR bank
- PPU $1C00-$1FFF (or $0C00-$0FFF): 1 KB switchable CHR bank
Solder Pad Config
- Normal mode : 'CL1' connected, 'CL2' connected, 'H' disconnected, 'V' disconnected.
- DEROM backward compatibility mode with Horizontal mirroring : 'CL1' disconnected, 'CL2' disconnected, 'H' disconnected, 'V' connected.
- DEROM backward compatibility mode with Vertical mirroring : 'CL1' disconnected, 'CL2' disconnected, 'H' connected, 'V' disconnected.
Note : In DEROM backward compatibility mode, mirroring is hardwired and IRQs are disabled. However, the additionnal bankswitching modes available by the MMC3 that weren't available with the 109 chip used on DEROM boards are still present.
Chips and pinouts
- PRG ROM - 256 kBit (32 KB x 8) (DIP-28)
---_---
+5V - |01 28| - +5V
A12 - |02 27| - A14
A7 - |03 26| - A13
A6 - |04 25| - A8
A5 - |05 24| - A9
A4 - |06 23| - A11
A3 - |07 22| - /OE (connected to PRG /CE of MMC3)
A2 - |08 21| - A10
A1 - |09 20| - GND (/CE ?)
A0 - |10 19| - D7
D0 - |11 18| - D6
D1 - |12 17| - D5
D2 - |13 16| - D4
GND - |14 15| - D3
-------
This pinout is compatible with standard 27C256 EPROMs, no rewiring needed.
- CHR ROM - 512 kBit (64 KB x 8) (DIP-28)
---_---
A15 - |01 28| - +5V
A12 - |02 27| - A14
A7 - |03 26| - A13
A6 - |04 25| - A8
A5 - |05 24| - A9
A4 - |06 23| - A11
A3 - |07 22| - /OE (/RD)
A2 - |08 21| - A10
A1 - |09 20| - /CE (CHR A13)
A0 - |10 19| - D7
D0 - |11 18| - D6
D1 - |12 17| - D5
D2 - |13 16| - D4
GND - |14 15| - D3
-------
This pinout is compatible with standard 27C512 EPROMs, as well with 27C256 (32 KB), 27C128 (16 KB) and 27C64 (8 KB). No rewiring is needed at all.
