NES 2.0 Mapper 403: Difference between revisions
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NES 2.0 Mapper 403 | {{DEFAULTSORT:403}}[[Category:Multicart mappers]][[Category:Mappers with CHR RAM]] | ||
'''NES 2.0 Mapper 403''' denotes the '''89433''' circuit board with up to 1 MiB PRG-ROM and 32 KiB of CHR-RAM, bankable with 8 KiB granularity. | |||
* ''Tetris Family - 玩家 19-in-1 智瑟實典'' (NO-1683) | |||
* ''Sachen Superpack'' (versions A-C) | |||
==PRG bank register ($4100)== | |||
Mask: $E103 | |||
D~[.PPP PPp.] | |||
+++-+++--- PRG A19..A14 | |||
Power-on value: $00 | |||
==CHR bank register ($4101, $8000-$FFFF)== | |||
Mask: $E103, $8000 | |||
D~[.... ..CC] | |||
++-- CHR A14..A13 | |||
Power-on value: $00 | |||
The latch at $8000-$FFFF is enabled/disabled via the Mode register's C bit. | |||
==Mode register ($4102)== | |||
Mask: $E103 | |||
D~[...H .C.N] | |||
| | +- 0: PRG A14=CPU A14 (NROM-256) | |||
| | 1: PRG A14=p (NROM-128) | |||
| +--- 0: Latch at $8000-$FFFF disabled | |||
| 1: Latch at $8000-$FFFF enabled | |||
+------ 0: Vertical mirroring | |||
1: Horizontal mirroring | |||
Power-on value: $00 | |||
Latest revision as of 19:46, 11 December 2021
NES 2.0 Mapper 403 denotes the 89433 circuit board with up to 1 MiB PRG-ROM and 32 KiB of CHR-RAM, bankable with 8 KiB granularity.
- Tetris Family - 玩家 19-in-1 智瑟實典 (NO-1683)
- Sachen Superpack (versions A-C)
PRG bank register ($4100)
Mask: $E103
D~[.PPP PPp.]
+++-+++--- PRG A19..A14
Power-on value: $00
CHR bank register ($4101, $8000-$FFFF)
Mask: $E103, $8000
D~[.... ..CC]
++-- CHR A14..A13
Power-on value: $00
The latch at $8000-$FFFF is enabled/disabled via the Mode register's C bit.
Mode register ($4102)
Mask: $E103
D~[...H .C.N]
| | +- 0: PRG A14=CPU A14 (NROM-256)
| | 1: PRG A14=p (NROM-128)
| +--- 0: Latch at $8000-$FFFF disabled
| 1: Latch at $8000-$FFFF enabled
+------ 0: Vertical mirroring
1: Horizontal mirroring
Power-on value: $00
