NES 2.0 Mapper 355: Difference between revisions
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NES 2.0 Mapper 355 is used for the original 1989 release of ''3D Block'' (copyright ''Hwang Shinwei'' rather than ''RCM Group'') and the original single-cartridge version of ''Block Force'', which runs on the same PCB that has "3D-Block" written on it. Its UNIF board name is '''3D-BLOCK''' without prefix. | NES 2.0 Mapper 355 is used for the original 1989 release of ''3D Block'' (copyright ''Hwang Shinwei'' rather than ''RCM Group'') and the original single-cartridge version of ''Block Force'', which runs on the same PCB that has "3D-Block" written on it. Its UNIF board name is '''3D-BLOCK''' without prefix. | ||
It is basically NROM-256 with 8 KiB of CHR-RAM rather than CHR-ROM, but with an unusual protection mechanism: a PIC16C54 microcontroller with an embedded internal program ROM watches A4..A14 of the 6502 CPU address bus and raises IRQs based on what it sees. | It is basically NROM-256 with 8 KiB of CHR-RAM rather than CHR-ROM, but with an unusual protection mechanism: a PIC16C54 microcontroller with an embedded internal program ROM watches A4..A14 of the 6502 CPU address bus and raises IRQs based on what it sees. | ||
To emulate this mapper, the embedded ROM's data, included as a [[NES_2.0#Byte_14_.28Misc._ROMs.29|Misc. ROM]] in the [[NES 2.0]] specification, must be executed by a [https://github.com/mamedev/mame/tree/master/src/devices/cpu/pic16c5x PIC16C54 emulator] (running at one fourth of the 6502 clock/M2 switching rate), with the emulated microcontrollers' input/output ports being connected to the cartridge's M2, IRQ and CPU A4..A14 signals in the following way: | To emulate this mapper, the embedded ROM's data (512 words, stored as 1024 bytes of little-endian data), included as a [[NES_2.0#Byte_14_.28Misc._ROMs.29|Misc. ROM]] in the [[NES 2.0]] specification, must be executed by a [https://github.com/mamedev/mame/tree/master/src/devices/cpu/pic16c5x PIC16C54 emulator] (running at one fourth of the 6502 clock/M2 switching rate), with the emulated microcontrollers' input/output ports being connected to the cartridge's M2, IRQ and CPU A4..A14 signals in the following way: | ||
PIC16C54 pin# Meaning | PIC16C54 pin# Meaning | ||
---------------------- | ---------------------- | ||
| Line 18: | Line 18: | ||
RB6 (12) CPU A13 | RB6 (12) CPU A13 | ||
RB7 (13) CPU A14 | RB7 (13) CPU A14 | ||
Note that even though ''3D Block'' seems to write specific values to addresses in the $4xxx range, since the CPU D0..D7 signals are not connected to the microcontroller, their values cannot affect IRQ generation, though their addresses could. | Note that even though ''3D Block'' seems to write specific values to addresses in the $4xxx range, since the CPU D0..D7 signals are not connected to the microcontroller, their values cannot affect IRQ generation, though their addresses could. | ||
==See also== | ==See also== | ||
[https://forums.nesdev.org/viewtopic.php?f=3&t=16267#p222579 PCB image and analysis] | [https://forums.nesdev.org/viewtopic.php?f=3&t=16267#p222579 PCB image and analysis] | ||
Revision as of 23:54, 19 December 2019
NES 2.0 Mapper 355 is used for the original 1989 release of 3D Block (copyright Hwang Shinwei rather than RCM Group) and the original single-cartridge version of Block Force, which runs on the same PCB that has "3D-Block" written on it. Its UNIF board name is 3D-BLOCK without prefix.
It is basically NROM-256 with 8 KiB of CHR-RAM rather than CHR-ROM, but with an unusual protection mechanism: a PIC16C54 microcontroller with an embedded internal program ROM watches A4..A14 of the 6502 CPU address bus and raises IRQs based on what it sees.
To emulate this mapper, the embedded ROM's data (512 words, stored as 1024 bytes of little-endian data), included as a Misc. ROM in the NES 2.0 specification, must be executed by a PIC16C54 emulator (running at one fourth of the 6502 clock/M2 switching rate), with the emulated microcontrollers' input/output ports being connected to the cartridge's M2, IRQ and CPU A4..A14 signals in the following way:
PIC16C54 pin# Meaning ---------------------- RA0 (17) /IRQ RA1 (18) CPU A6 RA2 (1) CPU A5 RA3 (2) CPU A4 RB0 (6) CPU A12 RB1 (7) CPU A7 RB2 (8) CPU A10 RB3 (9) CPU A11 RB4 (10) CPU A9 RB5 (11) CPU A8 RB6 (12) CPU A13 RB7 (13) CPU A14
Note that even though 3D Block seems to write specific values to addresses in the $4xxx range, since the CPU D0..D7 signals are not connected to the microcontroller, their values cannot affect IRQ generation, though their addresses could.
