INES Mapper 116

These boards appear to have been researched by Cah4e3. They're used for some chinese games and bootlegs. He has described them in fceu-mm sources as:

* SL12 Protected 3-in-1 mapper hardware (VRC2, MMC3, MMC1)
* the same as 603-5052 board (TODO: add reading registers, merge)
* SL1632 2-in-1 protected board, similar to SL12 (TODO: find difference)

The following PCBs are listed as examples:

* Garou Densetsu Special (G0904.PCB, Huang-1, GAL dip: W conf.)
* Kart Fighter (008, Huang-1, GAL dip: W conf.)
* Somari (008, C5052-13, GAL dip: P conf., GK2-P/GK2-V maskroms)
* Somari (008, Huang-1, GAL dip: W conf., GK1-P/GK1-V maskroms)
* AV Mei Shao Nv Zhan Shi ()
* Samurai Spirits (Full version) (Huang-1, GAL dip: unk conf. GS-2A/GS-4A maskroms)
* Contra Fighter (603-5052 board, C5052-3, GAL dip: unk conf. SC603-A/SCB603-B maskroms)

These documents were verified by implementation into bizhawk based solely on the fceu-mm sources. FCEUX also possesses fceu-mm's sources for this mapper.

This equipment is much simpler to operate than you might expect, considering that it is a combination of VRC2 + MMC3 + MMC1. There is a register:

 Range,Mask:   $4000-7FFF, $4100
   $4100:  [.... .CMM]
     MM = Mapper mode
          %00 = VRC2
          %01 = MMC3
          %02, %03 = MMC1
      C = 256K CHR ROM base (AV Girl Fighting uses this)

This control register supposedly occupies the WRAM address range, so there can be no WRAM. However, it only answers to $41xx.

The Mapper mode bits control which of the mapper circuits are connected to the NES. All of the PRG-based registers and IRQ signals are connected or disconnected accordingly. This means that in order to configure one of the mapper circuits, it must be connected.

The VRC2 acts somewhat differently from a stock VRC2. Fundamentally, the VRC2 registers are mapped as documented elsewhere as VRC2b, not suffering from any of the PCB address signal rewiring complexities as most of the VRC-based boards. However, it seems important that the $8xxx, $9xxx, $Axxx regs be mapped to the entire $1000 region (unlike stock VRC2 which is supposedly strictly answering to $8000-$8003, etc.) This is important for "Garou Densetsu Special". Additionally, the PRG registers are 5 bits instead of 4. Finally, the CHR regs must be initialized specially: the first four to $FF, at least. (SOMARI-W depends on this). There is no evidence for what the subsequent 4 CHR regs must be initialized to.

The MMC3 acts exactly as a stock TxROM. It has not been determined which MMC3 variant this MMC3 is acting as. Fceu-mm makes it seem as if the mmc3 CHR regs must be initialized at power-on in a certain pattern; it is unknown why this would be important.

The MMC1 acts exactly as a stock SxROM. Fceu-mm contained "hacky hacky" logic to do a reset of sorts on the MMC1 whenever the low bit of $41xx's address was set, claiming it was necessary for SOMARI-W.

The C bit of the m116's control reg simply provides a CHR ROM base offset for the VRC2 and MMC3 modes. After running the VRC2 or MMC3 logic, toss this extra signal onto the output CHR ROM address bus. One might speculate that this applies to MMC1 as well, but there is no evidence.