INES Mapper 050

 Here are Disch's original notes:  
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 =  Mapper 050          =
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 Example Game:
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 Super Mario Bros. (JU) (Alt Levels)   (SMB2j pirate cart)
 
 
 Notes:
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 No PRG-RAM.  PRG setup is bizarre, as is the scrambled PRG reg.
 
 
 Registers:
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 Range,Mask:   $4020-5FFF, $4120
 
 
   $4020:  [.... HLLM]
     L,M,H = Low, middle, and high bits of PRG Reg
 
 
   $4120:  [.... ...E]  IRQ Enable (0=Disabled, 1=Enabled)
 
 
 
 PRG Setup:
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       $6000   $8000   $A000   $C000   $E000  
     +-------+-------+-------+-------+-------+
     | {$0F} | { 8 } | { 9 } | $4020 | {$0B} |
     +-------+-------+-------+-------+-------+
 
 
 IRQs:
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   Writing to $4120 with E=0 will disable IRQs, acknowledge the pending IRQ, and reset the IRQ counter to 0.
 Writing with E=1 will just enable IRQs (but will not change anything else).
 
   When enabled, The IRQ counter will count up every CPU cycle.  When it makes the transition from
 $0FFF->$1000, and IRQ is generated.  The counter appears to be a full 16-bits (so it will not wrap until
 $FFFF)

The purported 16-bit counter seems unlikely. Both FCEUX and Nestopia disable the counter when it fires. The actual hardware is more likely a 13-bit counter with its MSB inverted into the Famicom's /IRQ line.