APU: Difference between revisions

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The outputs from all the channels are combined using a [[APU Mixer|non-linear mixing]] scheme.
The outputs from all the channels are combined using a [[APU Mixer|non-linear mixing]] scheme.


=== Famicom extra audio ===
=== On board extra audio ===
* [[FDS_audio|FDS audio]]
* [[FDS_audio|FDS]]
* [[Namco_106_audio|Namco 106 audio]]
* [[MMC5_audio|MMC5]]
* [[Namco_106_audio|Namco 106]]
* [[VRC6_audio|VRC6]], [[VRC7_audio|VRC7]]
* [[VRC6_audio|VRC6]], [[VRC7_audio|VRC7]]


=== Note ===
=== Note ===
* The NES APU is also documented in [http://nesdev.parodius.com/2A03%20technical%20reference.txt Brad Taylor's 2A03 Technical Reference].
* The NES APU is also documented in [http://nesdev.parodius.com/2A03%20technical%20reference.txt Brad Taylor's 2A03 Technical Reference].
* These web pages are based on [http://nesdev.parodius.com/apu_ref.txt Blargg's NES APU Reference].
* These web pages are based on [http://nesdev.parodius.com/apu_ref.txt Blargg's NES APU Reference].

Revision as of 15:30, 12 June 2009

I am still polishing this reference. I've gotten most of the main work done. -- Blargg

The NES APU is the audio processing unit in the NES console which generates sound for games. It is implemented in the RP2A03 (NTSC) and RP2A07 (PAL) chips. Its registers are mapped in the range $4000-$4017.

For clarity, this reference describes the abstract operation of the APU, not the exact hardware implementation. As long as the behavior is documented, the exact kind of counter or shift register used to implement a particular behavior is essentially irrelevant; in any case, the exact hardware implementation can only be speculated on without access to very expensive chip-level reverse-engineering tools.

Registers Channel Units
$4000-$4003 Pulse 1 Timer, Length Counter, Envelope, Sweep
$4004-$4007 Pulse 2 Timer, Length Counter, Envelope, Sweep
$4008-$400B Triangle Timer, Length Counter, linear counter
$400C-$400F Noise Timer, Length Counter, Envelope, shift register w/ feedback
$4010-$4013 DMC Timer, memory reader, sample buffer, output unit
$4015 All Length Counter enable and status
$4017 All Update counter

Each channel has a variable-rate timer clocking a waveform generator, and various modulators driven by low-frequency clocks from the update counter. The DMC plays samples while the other channels play waveforms. Each sub-unit of a channel generally runs independently and in parallel to other units, and modification of a channel's parameter usually affects only one sub-unit and doesn't take effect until that unit's next internal cycle begins.

The read/write status register allows channels to be enabled and disabled, and their current length counter status to be queried.

The outputs from all the channels are combined using a non-linear mixing scheme.

On board extra audio

Note