CPU Test Mode: Difference between revisions

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m (make this less confusing)
(Removes the 2A03 PIT information (now on its own page). Notes 2A03 pin 30 does nothing.)
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== 2A03E ??? ==
Pin 30 on the 2A03 provides special functionality in some revisions of the chip and is normally grounded.
 
== 2A03E ==
The schematic for the [//nesdev.org/Playchoice.pdf Playchoice 10] permits the supervisor CPU to stop the 2A03E by driving pin 30 high, and then can reset it (both driving pin 30 low and 2A03E /RESET low). Testing pin 30 by itself (with a button) just crashes the CPU. It's unclear if it can be used for anything else.
The schematic for the [//nesdev.org/Playchoice.pdf Playchoice 10] permits the supervisor CPU to stop the 2A03E by driving pin 30 high, and then can reset it (both driving pin 30 low and 2A03E /RESET low). Testing pin 30 by itself (with a button) just crashes the CPU. It's unclear if it can be used for anything else.


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== 2A03G / 2A03H Test Mode ==
== 2A03G / 2A03H Test Mode ==
Pin 30 of the 2A03 revision G can be activated to enable a special test mode for the APU. This activates registers for testing the APU at $4018-$401A at the expense of deactivating the joypad input registers at $4016-$4017:
Pin 30 of the 2A03G and 2A03H can be activated to enable a special test mode for the APU. This activates registers for testing the APU at $4018-$401A at the expense of deactivating the joypad input registers at $4016-$4017:
  R$4018: [BBBB AAAA] - current instant DAC value of B=pulse2 and A=pulse1 (either 0 or current volume)
  R$4018: [BBBB AAAA] - current instant DAC value of B=pulse2 and A=pulse1 (either 0 or current volume)
  R$4019: [NNNN TTTT] - current instant DAC value of N=noise (either 0 or current volume)  
  R$4019: [NNNN TTTT] - current instant DAC value of N=noise (either 0 or current volume)  
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                       (pulse+noise always output current volume, triangle/DPCM no longer advance)
                       (pulse+noise always output current volume, triangle/DPCM no longer advance)


== 2A03letterless Programmable Interval Timer ==
== 2A03 ==
Visual inspection of the original 2A03 revision indicates there was planned IRQ functionality from $401C-$401F, but this was left unfinished and unusable and was outright removed from later CPU revisions.
Pin 30 has no function in the original version of the 2A03.
W$401C,D,E: write lower, middle, upper bits of counter reload value
R$401C,D,E: read lower, middle, upper bits of current counter value
W$401F: [ELAC DTZC]
          |||| ||||
          |||+----+-- Clock source
          |||  |||    00: M2÷16  10: M2÷256
          |||  |||    01: Rising edges of JOY2  11: Falling edges of JOY2
          |||  ||+--- Exists but does nothing. Toggles (invisibly) on terminal count.
          |||  |+---- Value driven out on JOY1. Toggles on terminal count.
          |||  +----- 1:count up; 0:count down
          ||+-------- 1:automatic reload when counter reaches 0; 0:counter stops while zero
          |+--------- 1:reload immediately
          +---------- 1:IRQ enabled (counts regardless)
R$401F: [E... ...I]
          |      |
          |      +-- Timer IRQ would be asserted if enabled
          +---------- IRQ is enabled
        Reads from $401F acknowledge the IRQ


== See also ==
== See also ==
* Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=9197 Breaking NES apart (WARNING: traffic)]
* Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=9197 Breaking NES apart]
* Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=14421 Memory map and 2A03 register map / 2A03 cutting-room floormetal]
* See: [[:File:Apu address.jpg]]
* See: [[:File:Apu address.jpg]]
* See: [[CPU pin out and signal description]]
* See: [[CPU pin out and signal description]]

Revision as of 23:05, 10 September 2022

Pin 30 on the 2A03 provides special functionality in some revisions of the chip and is normally grounded.

2A03E

The schematic for the Playchoice 10 permits the supervisor CPU to stop the 2A03E by driving pin 30 high, and then can reset it (both driving pin 30 low and 2A03E /RESET low). Testing pin 30 by itself (with a button) just crashes the CPU. It's unclear if it can be used for anything else.

2A07A

Pin 30 is an external /RDY input, its inverse effectively being ANDed together with the internal signal from the 2A03's DMA hardware. It's suspected the 2A03E is actually the same, but we don't have any evidence yet.

2A03G / 2A03H Test Mode

Pin 30 of the 2A03G and 2A03H can be activated to enable a special test mode for the APU. This activates registers for testing the APU at $4018-$401A at the expense of deactivating the joypad input registers at $4016-$4017: 

R$4018: [BBBB AAAA] - current instant DAC value of B=pulse2 and A=pulse1 (either 0 or current volume)
R$4019: [NNNN TTTT] - current instant DAC value of N=noise (either 0 or current volume) 
                      and T=triangle (anywhere from 0 to 15)
R$401A: [.DDD DDDD] - current instant DAC value of DPCM channel (same as value written to $4011)
W$401A: [L..T TTTT] - set state of triangle's sequencer to T, and lock all channels if L=1
                      (pulse+noise always output current volume, triangle/DPCM no longer advance)

2A03

Pin 30 has no function in the original version of the 2A03.

See also

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