Controller port pinout

The NES controller pinout:

        .-
 GND -- |O\
 CLK <- |OO\ -- +5V
 OUT <- |OO| <- D3
  D0 -> |OO| <- D4
        '--'

(Directions are relative to the jack on the front of the NES)

PAL

Some PAL region systems have a set of diodes on the inside of the controller port which make it incompatible with NTSC controllers.

+5V --|>|-- jack
 D3 --|>|-- jack
 D4 --|>|-- jack
 D0 --|>|-- jack
OUT --|<|-- jack
CLK --|<|-- jack

With these diodes, the OUT and CLK lines have to be pulled high by the controller, or else the controller can't receive these signals. See: Standard controller: PAL

These diodes are also present on the ports of the Four Score (NESE-034) accessory for this region.

Super NES

The FC Twin NES/SNES combo clone uses Super NES controllers, whose pinout is as follows:

 1 [oooo|ooo) 7  1:+5V  2:Clk  3:Out  4:D0  5:D1  6: I/O  7:Gnd

An adapter to use Super NES controllers on an NES (or NES controllers on an FC Twin) could be constructed as follows (leaving D3 and D4 unconnected):

        .-
 GND -- |7\
 CLK <- |21\ -- +5V
 OUT <- |3o| -- (D3)
  D0 -> |4o| -- (D4)
        '--'

1. Buy two controller extension cables, one for NES and one for Super NES, and cut them apart. Strip the cut ends to reveal a small amount of bare wire.
2. Using inline splice technique, wrap each wire from one cable with the corresponding wire from the other cable.
3. With solder and a soldering iron, glue each wrapped pair together.
4. With electrical tape, wrap each joint to insulate it from the other wires.
5. Apply heat shrink around the whole assembly.

Notes

• The signal read by the CPU is logically inverted from the signal input on the D0-4 lines. A low voltage on D0 will be read as a 1 bit from $4016/4017.
• CLK will be low during reads from the CPU, then immediately return to high. This rising edge transition is used to clock the shift register inside the standard controller.
• OUT is a signal latched and held from the last CPU write to $4016:0. For standard controller reads, the program will write a 1 to load the shift register, then return to 0 before reading the results.

See Also

• Standard controller
• Expansion port