Talk:CPU power up state: Difference between revisions
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(using my previous trace of the reset line combined with the "regions" image overlay) |
mNo edit summary |
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* All 4 length counters | * All 4 length counters | ||
* Triangle channel linear counter ($4008), maybe - it might only affect the counter itself, not the reload value | * Triangle channel linear counter ($4008), maybe - it might only affect the counter itself, not the reload value | ||
* Triangle channel Position | * Triangle channel Position | ||
* DPCM Sample Length counter (not the reload value) | * DPCM channel Sample Length counter (not the reload value) | ||
* DPCM channel Position ($4011) | * DPCM channel Position ($4011) | ||
* DPCM channel Sample Buffer and Bit Counter | * DPCM channel Sample Buffer and Bit Counter | ||
* DPCM channel Sample Address counter (not the reload value) | * DPCM channel Sample Address counter (not the reload value) | ||
* DPCM state machine | * DPCM channel state machine | ||
* Sprite DMA counter and state machine | * Sprite DMA address counter and state machine | ||
* Part of the Frame Counter (notably, '''not''' the two writable bits of $4017) | * Part of the Frame Counter (notably, '''not''' the two writable bits of $4017) | ||
* Debug register $401A bit 7 | * Debug register $401A bit 7 | ||
--[[User:Quietust|Quietust]] 16:40, 8 June 2011 (UTC) | --[[User:Quietust|Quietust]] 16:40, 8 June 2011 (UTC) | ||
Revision as of 16:41, 8 June 2011
Parts of the APU which appear to be affected by reset (determined by tracing the reset signal throughout the chip):
- Square channel volume/envelope rate ($4000/$4004 bits 0-3), maybe - it might only affect the internal timer used for decrementing the envelope counter
- Noise channel volume/envelope rate ($4008 bits 0-3), maybe - see above
- Square channel frequency counter, including the 3 duty cycle bits
- Triangle channel frequency counter
- Noise channel frequency counter, sort of - it looks to force the LFSR input to 0, so a very short reset pulse might only partially clear it
- DPCM channel frequency counter, sort of - it looks to force the LFSR input to 0, so a very short reset pulse might only partially clear it
- Noise channel frequency ($400E bits 0-3)
- Square channel sweep counter
- All 4 length counters
- Triangle channel linear counter ($4008), maybe - it might only affect the counter itself, not the reload value
- Triangle channel Position
- DPCM channel Sample Length counter (not the reload value)
- DPCM channel Position ($4011)
- DPCM channel Sample Buffer and Bit Counter
- DPCM channel Sample Address counter (not the reload value)
- DPCM channel state machine
- Sprite DMA address counter and state machine
- Part of the Frame Counter (notably, not the two writable bits of $4017)
- Debug register $401A bit 7
--Quietust 16:40, 8 June 2011 (UTC)
