Talk:CPU pinout: Difference between revisions
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m (my mistake - they're all enhancement mode (VCC->gate = source and drain connected), but ones with "thick" gates are effectively resistors when off (where "thicker" == lower resistance)) |
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==Pin 30== | ==Pin 30== | ||
I've managed to trace pin 30 all the way to the enables for $4018-$401A, but pulling the pin high seems to have some other effects on the $4000-$401F read/write enable signals themselves. Exactly what those effects are, I don't know - there's just way too much stuff in there to understand at once. The other effects do seem to go through some sort of delay (a chain of pull-up resistors normally | I've managed to trace pin 30 all the way to the enables for $4018-$401A, but pulling the pin high seems to have some other effects on the $4000-$401F read/write enable signals themselves. Exactly what those effects are, I don't know - there's just way too much stuff in there to understand at once. The other effects do seem to go through some sort of delay (a chain of pull-up resistors normally driven low), so perhaps connecting pin 30 to M2 (or even CLK IN) would work to enable these registers. --[[User:Quietust|Quietust]] 15:51, 30 March 2011 (UTC) |
Revision as of 15:52, 30 March 2011
Pin 30
I've managed to trace pin 30 all the way to the enables for $4018-$401A, but pulling the pin high seems to have some other effects on the $4000-$401F read/write enable signals themselves. Exactly what those effects are, I don't know - there's just way too much stuff in there to understand at once. The other effects do seem to go through some sort of delay (a chain of pull-up resistors normally driven low), so perhaps connecting pin 30 to M2 (or even CLK IN) would work to enable these registers. --Quietust 15:51, 30 March 2011 (UTC)