CPU Test Mode: Difference between revisions
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* Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=9197 Breaking NES apart (WARNING: traffic)] | * Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=9197 Breaking NES apart (WARNING: traffic)] | ||
* Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=14421 Memory map and 2A03 register map] | * Forum: [http://forums.nesdev.org/viewtopic.php?f=9&t=14421 Memory map and 2A03 register map / 2A03 cutting-room floormetal] | ||
* See: [[:File:Apu address.jpg]] | * See: [[:File:Apu address.jpg]] | ||
* See: [[CPU pin out and signal description]] | * See: [[CPU pin out and signal description]] | ||
Revision as of 18:26, 8 July 2016
Pin 30 of the 2A03 can be activated to enable a special test mode for the CPU. This activates a few registers in the range of $4018-401F.
Test mode activates registers for testing the APU at $4018-401A.
Visual inspection of the CPU indicates there was planned IRQ functionality from $401C-401F, but this is left unfinished and unusable.
