CPU: Difference between revisions
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<noinclude> | <noinclude> | ||
* | * [[CPU_MEMORY_MAP|Memory map]] | ||
* [[CPU_PINOUT_AND_SIGNAL_DESCRIPTION|Pinout]] | * [[CPU_PINOUT_AND_SIGNAL_DESCRIPTION|Pinout]] | ||
* Powerup state | * [[CPU_POWERUP_STATE|Powerup state]] | ||
* status flag behavior | * [[CPU_STATUS_FLAG_BEHAVIOR|status flag behavior]] | ||
</noinclude> | </noinclude> | ||
== Note == | == Note == | ||
* The CPU's clock is obtained by dividing a 21.477272 MHz clock source by 12 (26.601712 MHz divided by 16 for PAL). | * The CPU's clock is obtained by dividing a 21.477272 MHz clock source by 12 (26.601712 MHz divided by 16 for PAL). | ||
* Kevtris has confirmed that all illegal 6502 opcodes execute identically on the 2A03/2A07. He has even went as far as to integrate them into the CopyNES BIOS. | * Kevtris has confirmed that all illegal 6502 opcodes execute identically on the 2A03/2A07. He has even went as far as to integrate them into the CopyNES BIOS. | ||
* For the CPU instruction list, please refer to this [[CPU_INSTRUCTION_LIST|section]]. | |||
* A printer friendly version covering all section is available [[CPU_ALL|here]]. | |||
Revision as of 06:48, 11 June 2009
The NES CPU core is based on the 6502 processor and runs at approximately 1.79 MHz (1.66 MHz in a PAL NES). It is made by Ricoh and lacks the MOS6502's decimal mode. In the NTSC NES, the RP2A03 chip contains the CPU and APU; in the PAL NES, the CPU and APU are contained within the RP2A07 chip.
Note
- The CPU's clock is obtained by dividing a 21.477272 MHz clock source by 12 (26.601712 MHz divided by 16 for PAL).
- Kevtris has confirmed that all illegal 6502 opcodes execute identically on the 2A03/2A07. He has even went as far as to integrate them into the CopyNES BIOS.
- For the CPU instruction list, please refer to this section.
- A printer friendly version covering all section is available here.
