NES 2.0 submappers/Proposals: Difference between revisions

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This page collects proposals for [[NES 2.0 submappers]] that are not yet ready for implementation.
This page collects proposals for [[NES 2.0 submappers]] that are not yet ready for implementation.


# Explain what game or ROM is incompatible with existing submappers.
# Explain how the proposed submapper should be implemented.
# Allow one or more other members of the community to independently verify that both 1 and 2 are correct. (We'll perform peer review, commentary, and possible revision/iteration here.)
# Allocate and document the new submapper, listing the relevant game/ROM.


== 004: MMC3 ==
When allocating new submappers, please consult kevtris' original proposal before choosing a number. If it is something he already assigned that we have just not adopted yet, use his existing assignment: [http://blog.kevtris.org/blogfiles/nes/submappers.txt submappers.txt]
Status: Draft


[[iNES Mapper 004]] represents the most common boards using these four ICs: early [[MMC3]], late MMC3, MC-ACC, and [[MMC6]].
If there is no existing game or ROM that requires a submapper, it should not yet be allocated. There is no end to possible variations of hardware, and there is no need to speculate on the future. If you want to work on a project that will require a new mapper, engage the community and/or seek help from others. Do not pre-emptively add a new mapper to the spec until there is something we can run with it. The spec will still be here when you're finished your project.


There are three known kinds of IRQ:
== 005: [[MMC5]] ==
;MMC3A:/IRQ is asserted on A12 rise, and loading the latch with 0 disables IRQ. Some chips labeled MMC3B also have this "old style" behavior. No games are known to rely on this behavior.
 
;MMC3C:/IRQ is asserted on A12 rise, and loading the latch with 0 produces an IRQ on every scanline. Some chips labeled MMC3B also have this "new style" behavior, as does the MMC6. Some later games rely on this behavior.
Status: MMC5A is unimplemented in emulators, and all existing games are also valid as MMC5. Seems to be de-facto low priority.
;MC-ACC:/IRQ is asserted on A12 fall, typically four pixels later than MMC3C. Interrupts can be produced every scanline, like the MMC3C. The MC-ACC is found on second-source PCBs manufactured by Acclaim found in [http://bootgod.dyndns.org:7777/search.php?keywords=MC-ACC&kwtype=pcb 13 games] from ''Alien 3'' to ''WWF King of the Ring''.


There are two known kinds of PRG RAM enable:
=== 005: 0 ===
;MMC3: One set of enable bits controls the entire chip.
MMC5
;MMC6: The first and second enables control the first and second half of PRG RAM, and an additional enable in bit 5 of $8000 controls the whole PRG RAM. Used in ''StarTropics'' and ''StarTropics 2''.


The [[TxROM|TEROM and TFROM]] boards have two jumpers that can respectively disable IRQs and force hard-wired mirroring. It is believed that nothing was ever released that used them.
=== 005: 1 ===
MMC5A


Kev allocated 0-2 as follows:
MMC5A is a known variant of the chip with some added features. However, all existing games with MMC5A also appear to have existed with MMC5. Nothing deliberately uses these features, but behaviour of a bug could differ by the selected chip.
* 0: MMC3C
* 1: MMC6 (different PRG RAM enable)
* 2: MMC3C with hard-wired mirroring
* 3: MC-ACC


Source: [http://blog.kevtris.org/blogfiles/nes/submappers.txt MMC3 submappers]; [http://forums.nesdev.org/viewtopic.php?p=128148#p128148 MC-ACC IRQ test results]; [http://forums.nesdev.org/viewtopic.php?p=152507#p152507 rainwarrior makes a case for MMC6 getting its own code]
=== Bitfield Wishlist ===


== 005: [[MMC5]] ==
A previous proposal included this wishlist to use it as a bitfield for other mapper configurations that were never used in games. With the discovery of MMC5A variations, there can no longer enough bits to accommodate all of these.
Status: Wishlist


Vertical split mode: <br>
Vertical split mode: <br>
Line 39: Line 36:
If both kinds of PRG-RAM present: <br>
If both kinds of PRG-RAM present: <br>
0: Chip 0 is battery-backed (ETROM (note: verify this)) <br>
0: Chip 0 is battery-backed (ETROM (note: verify this)) <br>
2: Chip 1 is battery-backed <br>
4: Chip 1 is battery-backed <br>


Pulse waves volume: <br>
Pulse waves volume: <br>
0: R1 is 6.8kΩ (as in all games that use expansion audio) <br>
0: R1 is 6.8kΩ (as in all games that use expansion audio) <br>
4: R1 is 15kΩ (the nominal value of this resistor) <br>
8: R1 is 15kΩ (the nominal value of this resistor) <br>
 
It is safe to leave the submapper number at 0 for all known games.


== 002, 003, 007: [[UxROM]], [[CNROM]], [[AxROM]] ==
== 070: Bandai UNROM/GNROM hybrid ==
Status: Draft
Status: Problem outline, needs followup?


AxROM (mapper 7) is the only known licensed discrete logic mapper to unreliably come with [[bus conflict]] prevention circuitry. While no game documented in NesCartDB was released in one region on multiple board variants, several games did change boards when localized.
There is [https://forums.nesdev.org/viewtopic.php?t=16916 a report] of a pirate copy of a game that seems to want mapper 70 without bus conflicts, even though Bandai's original hardware should have them.


The following table is tentatively offered-<br>
Tentatively, we could use the same submappers as those standardized for mappers 2, 3, & 7.
0: Normal (No advisory statement is made as to whether this game has bus conflicts) (uninvestigated AOROM) <br>
1: Bus conflicts do not occur (ANROM) <br>
2: Bus conflicts occur (AMROM)


Although all Nintendo-manufactured games using normal CNROM (mapper 3), normal UxROM (mapper 2), and inverted UxROM (mapper 180) had bus conflicts, apparently several unlicensed games require their absence, as does the updated version of ''Donkey Kong'' with the pie factory level.[http://www.nintendoage.com/forum/messageview.cfm?catid=22&threadid=44613] This same table should be used for them, too.
== [[iNES Mapper 083|083]]: Cony ==
Status: Needs documentation of affected games and implementation testing.


CNROM with security diodes (mapper 185) has a different set of submapper definitions.
"There's actually three different versions of the hardware, all assigned to the same mapper. Unfortunately, we have no idea which is which."


== 019: Namco 129 and 163 ==
Kevtris's assignments:
Status: Problem outline
=== 083: 0 ===
"Bog-standard Cony mapper.  1K CHR ROM banks, no WRAM."


[[iNES Mapper 019|Mapper 19]] designates the [[Namco 163|Namco 129 and 163]], which supports [[Namco 163 audio|expansion sound]], IRQs, and ROM nametables.
=== 083: 1 ===
"Same, but with 2K CHR ROM banks instead."


Different 163-using PCBs used a different resistor to change the volume of the expansion audio relative to the internal 2A03 audio. It is unclear if this variation warrants a submapper.
=== 083: 2 ===
"This is the standard Cony mapper with the following changes:


KH allocated a submapper specifically for the N163-using game Mindseeker. It is not known what is different about this game.
# 1K CHR ROM banks (like 83.0)


<!-- Tentative suggestion:<br/>
# a 4 bit 256K CHR/PRG bank select register:
Mapper 19:<br/>
#* B000hbits 6 and 7 select the 256K superbank
1: N163, expansion audio unused (mixing resistor: 0Ω)<br/>
2: N163, mixing resistor4.7kΩ<br/>
3: N163, mixing resistor: 10kΩ<br/>
4: N163, mixing resistor: 15kΩ<br/>
9: N129. Expansion audio is known buggy relative to N163, but other differences are not known.<br/>
-->
Source: [http://blog.kevtris.org/blogfiles/nes/submappers.txt KH's submappers]


== 021, 023, 025: VRC4 ==
# 1 byte of RAM at 5103h (stores the last game played) Game will not start without this RAM byte.
Konami's [[VRC4]] mapper has five known variations of how the board connects low CPU address lines among A7-A0 to the port select lines of the mapper.
These are spread across three mappers: two for [[iNES Mapper 021|21]], two for [[iNES Mapper 025|25]], and one for [[iNES Mapper 023|23]].
There are theoretically 8*7 = 56 ways to wire these, but in all five extant possibilities, two adjacent address lines are used: A2 and A1, A0 and A1, A7 and A6, A2 and A3, and A3 and A2.
All 14 combinations of two adjacent address lines easily fit in a submapper number:
<pre>
3210
||||
|+++- Which address line corresponds is wired to the A1 in the VRC4a
+---- 0: Use next lower address line for VRC4a A2; 1: use next higher line
</pre>
The values 0 (A0 and next lower) and 15 (A7 and next higher) are impossible.


The [[VRC4]] article describes the ports by mapping them to the variant called "VRC4a" on that page, which uses A2 and A1, putting the four [[VRC IRQ]] ports (IRQ Latch low, IRQ Latch high, IRQ Control, and IRQ Acknowledge) at $F000, $F002, $F004, and $F006.
# WRAM at 6000-7FFFh.  WRAM is banked with the PRG/CHR superbank.  This gives a total of 32K. It is battery backed.
{| class="tabular"
! Nickname || A2 || A1 || Registers || iNES mapper || NES 2.0 submapper
|-
| VRC4a || A2 || A1 || $x000, $x002, $x004, $x006 || 21 || 9
|-
| VRC4b || A0 || A1 || $x000, $x002, $x001, $x003 || 25 || 1
|-
| VRC4c || A7 || A6 || $x000, $x040, $x080, $x0C0 || 21 || 14
|-
| VRC4d || A2 || A3 || $x000, $x008, $x004, $x00C || 25 || 3
|-
| VRC4e || A3 || A2 || $x000, $x004, $x008, $x00C || 23 || 10
|}


== 023, 025: VRC2 ==
== [[iNES Mapper 086|086]]: Jaleco JF-13 ==
Mappers [[iNES Mapper 023|23]] and [[iNES Mapper 025|25]] are used for both Konami's [[VRC2]] and VRC4.
Status: Needs documentation of behaviour differences and chip emulation, a way to dump sample data for emulatable ROMs, and relevant games.
It is tentatively suggested that submapper 15 (invalid per the VRC4 definitions) be used to mark VRC2-using games, to handle the bit at $6000 and lack of interrupts.
Neither divides CHR bank select by two, unlike [[INES Mapper 022|#22]].
* 23.15 is VRC2 ($xxx0, $xxx1, $xxx2, $xxx3)
* 25.15 is VRC2 ($xxx0, $xxx2, $xxx1, $xxx3)


== [[iNES Mapper 185]] ==
There is a bootleg variant that uses a UM5100 (DPCM) instead of µPD7756C (ADPCM).
Status: Draft


A few NROM-like games were released on CNROM boards where all four bits of the latch were solely used as an anti-piracy measure. While a documented heuristic exists for which values were used, we tentatively suggest that the submapper here indicate the value to be written to the latch for normal operation (<tt>submapper = (latch&0x30)/4+(latch&3)</tt>)
=== 086: 0 ===
Uses µPD7756C (Standard).


<pre>
=== 086: 1 ===
3210 
Uses UM5100 (Bootleg).
||||
|||+- Bit 0 (bank number)
||+-- Bit 1 (bank number)
|+--- Bit 4 (diode config)
+---- Bit 5 (diode config)
</pre>


In the case that any of the bits are "don't care", use 0.
== References ==
<references />
* [http://atariage.com/forums/topic/242970-fpga-based-videogame-system/?p=3687219 Atari Age forum post] - Kevtris' Analogue NT Mini firmware notes including a slightly updated submapper list.

Latest revision as of 19:09, 18 January 2023

This page collects proposals for NES 2.0 submappers that are not yet ready for implementation.

  1. Explain what game or ROM is incompatible with existing submappers.
  2. Explain how the proposed submapper should be implemented.
  3. Allow one or more other members of the community to independently verify that both 1 and 2 are correct. (We'll perform peer review, commentary, and possible revision/iteration here.)
  4. Allocate and document the new submapper, listing the relevant game/ROM.

When allocating new submappers, please consult kevtris' original proposal before choosing a number. If it is something he already assigned that we have just not adopted yet, use his existing assignment: submappers.txt

If there is no existing game or ROM that requires a submapper, it should not yet be allocated. There is no end to possible variations of hardware, and there is no need to speculate on the future. If you want to work on a project that will require a new mapper, engage the community and/or seek help from others. Do not pre-emptively add a new mapper to the spec until there is something we can run with it. The spec will still be here when you're finished your project.

005: MMC5

Status: MMC5A is unimplemented in emulators, and all existing games are also valid as MMC5. Seems to be de-facto low priority.

005: 0

MMC5

005: 1

MMC5A

MMC5A is a known variant of the chip with some added features. However, all existing games with MMC5A also appear to have existed with MMC5. Nothing deliberately uses these features, but behaviour of a bug could differ by the selected chip.

Bitfield Wishlist

A previous proposal included this wishlist to use it as a bitfield for other mapper configurations that were never used in games. With the discovery of MMC5A variations, there can no longer enough bits to accommodate all of these.

Vertical split mode:
0: SL (all known hardware)
1: CL

If only one kind (battery or non-battery) of PRG-RAM present:
0: PRG-RAM is contiguous (EKROM, EWROM)
2: PRG-RAM is not contiguous; is split in half across two chips

If both kinds of PRG-RAM present:
0: Chip 0 is battery-backed (ETROM (note: verify this))
4: Chip 1 is battery-backed

Pulse waves volume:
0: R1 is 6.8kΩ (as in all games that use expansion audio)
8: R1 is 15kΩ (the nominal value of this resistor)

070: Bandai UNROM/GNROM hybrid

Status: Problem outline, needs followup?

There is a report of a pirate copy of a game that seems to want mapper 70 without bus conflicts, even though Bandai's original hardware should have them.

Tentatively, we could use the same submappers as those standardized for mappers 2, 3, & 7.

083: Cony

Status: Needs documentation of affected games and implementation testing.

"There's actually three different versions of the hardware, all assigned to the same mapper. Unfortunately, we have no idea which is which."

Kevtris's assignments:

083: 0

"Bog-standard Cony mapper. 1K CHR ROM banks, no WRAM."

083: 1

"Same, but with 2K CHR ROM banks instead."

083: 2

"This is the standard Cony mapper with the following changes:

  1. 1K CHR ROM banks (like 83.0)
  1. a 4 bit 256K CHR/PRG bank select register:
    • B000h: bits 6 and 7 select the 256K superbank
  1. 1 byte of RAM at 5103h (stores the last game played) Game will not start without this RAM byte.
  1. WRAM at 6000-7FFFh. WRAM is banked with the PRG/CHR superbank. This gives a total of 32K. It is battery backed.

086: Jaleco JF-13

Status: Needs documentation of behaviour differences and chip emulation, a way to dump sample data for emulatable ROMs, and relevant games.

There is a bootleg variant that uses a UM5100 (DPCM) instead of µPD7756C (ADPCM).

086: 0

Uses µPD7756C (Standard).

086: 1

Uses UM5100 (Bootleg).

References

  • Atari Age forum post - Kevtris' Analogue NT Mini firmware notes including a slightly updated submapper list.