NES 2.0 Mapper 344: Difference between revisions

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(Describe known solder pads. Have to think about how to apply this to submappers given that only some combinations make sense.)
m (→‎Outer Bank and Mode Register ($6000-$7FFF, write): Showing address bits 0-3 in the mask.)
 
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{{DEFAULTSORT:344}}[[Category:Multicart mappers]][[Category:MMC3-like mappers]][[Category:Mappers with scanline IRQs]]
{{DEFAULTSORT:344}}[[Category:Multicart mappers]][[Category:MMC3-like mappers]][[Category:Mappers with scanline IRQs]]
'''NES 2.0 Mapper 344''' denotes the '''GN-26''' and '''NC7000M''' multicart circuit boards. Its UNIF board names are '''BMC-GN-26''' (with incorrect PRG bank order) and '''BMC-BS-110''' (which is the name of a different PCB whose name was mixed-up).
'''NES 2.0 Mapper 344''' denotes the '''GN-26''' [[MMC3]]-based multicart circuit board. Its UNIF board name is '''BMC-GN-26''' (with incorrect PRG bank order).


The circuit board has three solder pads with bankswitching-relevant functionality (plus several others):
* S0: Connect MMC3 CHR A17 to CHR-ROM A17 or not
* S1: Connect $6000.0 to CHR-ROM A17 or not
* S2: Connect $6000.4 or $6000.1 to CHR A18
Known cartridges:
* ''快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1''
* ''快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1''
** S0: MMC3 CHR A17 connected to CHR-ROM A17
** S1: $6000.0 connected to CHR-ROM A17
** S2: $6000.1 connected to CHR-ROM A18
* ''14/400/8000/3000000-in-1''
** S0: MMC3 CHR A17 not connected to CHR-ROM A17
** S1: $6000.0 connected to CHR-ROM A17
** S2: $6000.1 connected to CHR-ROM A18
* ''7000-in-1'' (CA-004)
** S0: MMC3 CHR A17 connected to CHR-ROM A17
** S1: $6000.0 not connected to CHR-ROM A17
** S2: $6000.4 connected to CHR-ROM A18


==Outer Bank and Mode Register ($6000-$7FFF, write)==
==Outer Bank and Mode Register ($6000-$7FFF, write)==
  Mask: $E000
  Mask: $E00F
   
   
  A~FEDC BA98 7654 3210
  A~FEDC BA98 7654 3210
   -------------------
   -------------------
   .... .... ...C DSBA
   011. .... .... SMBA
                | ++++- =$08: CPU $8000-$FFFF D0/D1: menu-selecting solder pads
                  ||++- PRG/CHR A18..17
                | |||| !=$08: CPU $8000-$FFFF D0/D1: normal data
                  ||+-- CHR A17 mode
                | ||++- PRG A18..17
                  ||     0: CHR A17=MMC3 A17
                | |||+- CHR A17 if solder pad S1=1
                  ||     1: CHR A17=$6000.0
                | ||+-- CHR A18 if solder pad S2=1
                  |+--- Select PRG-ROM mode
                | |+--- Select PRG-ROM mode
                  |      0: MMC3 PRG mode
                | |      0: MMC3 mode
                  |      1: NROM PRG mode
                | |      1: NROM mode (see below)
                  +---- Solder pad test
                | +---- PRG A14 mode when S=1
                |        0: PRG A14=CPU A14          (NROM-256)
                |        1: PRG A14=MMC3 reg 6 bit 1 (NROM-128)
                +------ CHR A18 if solder pad S2=0
* WRAM must be enabled in $A001.7 before writing to this register.
* WRAM must be enabled in $A001.7 before writing to this register.
* The inner PRG bank is restricted to 128 KiB.
* The inner PRG bank is restricted to 128 KiB.
* NROM mode forces MMC3's CPU A13 and A14 inputs to GND and replaces MMC3's PRG A13 output with CPU A13. This means that MMC3 bank register 6 bits 1-3 provides PRG A14..A16 for the entire CPU $8000-$FFFF range.
* NROM mode PRG forces MMC3's CPU A13 and A14 inputs to GND and replaces MMC3's PRG A13 output with CPU A13. This means that MMC3 bank register 6 bits 1-3 provide PRG A14..A16 for the entire CPU $8000-$FFFF range.
* The common dump of ''快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1'' has the 128 KiB PRG-ROM banks mixed-up, correct would be in the order 0, 3, 1, 2.
* The common dump of ''快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1'' has the 128 KiB PRG-ROM banks mixed-up, correct would be in the order 0, 3, 1, 2.
* Depending on whether a solder pad is connected, setting the S bit may disable PRG-ROM. The menu sets this bit to select between two different game counts.
==MMC3-compatible registers==
==MMC3-compatible registers==
Mask: $E001
Mask: $E001


See [[MMC3]].
See [[MMC3]].

Latest revision as of 21:01, 1 March 2022

NES 2.0 Mapper 344 denotes the GN-26 MMC3-based multicart circuit board. Its UNIF board name is BMC-GN-26 (with incorrect PRG bank order).

  • 快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1

Outer Bank and Mode Register ($6000-$7FFF, write)

Mask: $E00F

A~FEDC BA98 7654 3210
  -------------------
  011. .... .... SMBA
                 ||++- PRG/CHR A18..17
                 ||+-- CHR A17 mode
                 ||     0: CHR A17=MMC3 A17
                 ||     1: CHR A17=$6000.0
                 |+--- Select PRG-ROM mode
                 |      0: MMC3 PRG mode
                 |      1: NROM PRG mode
                 +---- Solder pad test
  • WRAM must be enabled in $A001.7 before writing to this register.
  • The inner PRG bank is restricted to 128 KiB.
  • NROM mode PRG forces MMC3's CPU A13 and A14 inputs to GND and replaces MMC3's PRG A13 output with CPU A13. This means that MMC3 bank register 6 bits 1-3 provide PRG A14..A16 for the entire CPU $8000-$FFFF range.
  • The common dump of 快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1 has the 128 KiB PRG-ROM banks mixed-up, correct would be in the order 0, 3, 1, 2.
  • Depending on whether a solder pad is connected, setting the S bit may disable PRG-ROM. The menu sets this bit to select between two different game counts.

MMC3-compatible registers

Mask: $E001

See MMC3.

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