NES 2.0 Mapper 289: Difference between revisions
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[[Category:Multicart mappers]]NES 2.0 Mapper 289 is used for at least | {{DEFAULTSORT:289}}[[Category:Multicart mappers]][[Category:Mappers with CHR RAM]]'''NES 2.0 Mapper 289''' is used for at least three multicarts designated in UNIF as '''BMC-60311C'''. | ||
*''(EW-16-1) Super HiK 17-in-1'' | |||
*''1995 Champion Cassette 1200-in-1 - 94年超值珍藏版'' | |||
*''Super 76-in-1'' (with Contra) | |||
==Mode Register ($6000), write== | ==Mode Register ($6000), write== | ||
D~[.... MLPP] Address mask: $E001 | |||
||++- PRG Banking Mode | |||
|| 0: NROM-128: PRG A14-A16 from Outer Bank Register | |||
|| 1: NROM-256: PRG A15-A16 from Outer Bank Register, PRG A14=CPU A14 | |||
|| 2: UNROM: PRG A14-A16 from Data Latch when CPU A14=0, and 111b when CPU A14=1 | |||
|| 3: PRG A14-16=1 regardless of CPU A14 | |||
|+--- Protect CHR-RAM | |||
| 0: CHR-RAM writable | |||
| 1: CHR-RAM write-protected | |||
+---- Select nametable mirroring type | |||
0: Vertical | |||
1: Horizontal | |||
==Outer Bank Register ($6001), write== | |||
D~[.QQQ QPPp] Address mask: $E001 | |||
||| |||+- PRG A14 in NROM-128 PRG Banking Mode | |||
||| |++-- PRG A16..15 in NROM-128/-256 Banking Modes | |||
+++-+---- PRG A20..A17 | |||
==Solder Pad Register ($6000, read)== | |||
D~[.... ..PP] Address mask: $E000 | |||
==Outer Bank Register ($ | |||| ||++- Solder pad setting | ||
++++-++--- Open Bus | |||
==Data Latch ($8000-$FFFF), write== | |||
D~[.... .PPP] Address mask: $8000 | |||
+++- PRG A16..14 in UNROM PRG Banking Mode when CPU A14=0 | |||
== | |||
Latest revision as of 18:27, 29 December 2022
NES 2.0 Mapper 289 is used for at least three multicarts designated in UNIF as BMC-60311C.
- (EW-16-1) Super HiK 17-in-1
- 1995 Champion Cassette 1200-in-1 - 94年超值珍藏版
- Super 76-in-1 (with Contra)
Mode Register ($6000), write
D~[.... MLPP] Address mask: $E001 ||++- PRG Banking Mode || 0: NROM-128: PRG A14-A16 from Outer Bank Register || 1: NROM-256: PRG A15-A16 from Outer Bank Register, PRG A14=CPU A14 || 2: UNROM: PRG A14-A16 from Data Latch when CPU A14=0, and 111b when CPU A14=1 || 3: PRG A14-16=1 regardless of CPU A14 |+--- Protect CHR-RAM | 0: CHR-RAM writable | 1: CHR-RAM write-protected +---- Select nametable mirroring type 0: Vertical 1: Horizontal
Outer Bank Register ($6001), write
D~[.QQQ QPPp] Address mask: $E001 ||| |||+- PRG A14 in NROM-128 PRG Banking Mode ||| |++-- PRG A16..15 in NROM-128/-256 Banking Modes +++-+---- PRG A20..A17
Solder Pad Register ($6000, read)
D~[.... ..PP] Address mask: $E000 |||| ||++- Solder pad setting ++++-++--- Open Bus
Data Latch ($8000-$FFFF), write
D~[.... .PPP] Address mask: $8000 +++- PRG A16..14 in UNROM PRG Banking Mode when CPU A14=0