INES Mapper 164: Difference between revisions

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(S bit has a special meaning on the PEC-9588)
 
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{{DEFAULTSORT:164}}[[Category:iNES Mappers]][[Category:Mappers using $4020-$5FFF]][[Category:Mappers with CHR RAM]]
{{DEFAULTSORT:164}}[[Category:iNES Mappers]][[Category:Mappers using $4020-$5FFF]][[Category:Mappers with CHR RAM]]
'''iNES Mapper 164''' denotes the 燕城 (Yànchéng) '''cy2000-3''' circuit board, used for the following games:
'''iNES Mapper 164''' denotes the ROM chipset of the 东达 (Dōngdá) ''PEC-9588 Pyramid Educational Computer'' that was later also used on the 燕城 (Yànchéng) '''cy2000-3''' circuit board, used for the following games:
* ''Final Fantasy 太空戰士 V'' (G-003)
* ''Final Fantasy 太空戰士 V'' (G-003)
* ''大話西游'' (Dàhuà Xīyóu, G-004)
* ''大話西游'' (Dàhuà Xīyóu, G-004)
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* ''Dark Seed - 黑暗之蛊'' (G-009)
* ''Dark Seed - 黑暗之蛊'' (G-009)
* ''口袋精靈: 金'' (Pokémon: Gold Edition, not to be confused with several similarly-named ports of the same name)
* ''口袋精靈: 金'' (Pokémon: Gold Edition, not to be confused with several similarly-named ports of the same name)
The chipset is also used in the Dongda PEC-9588 Pyramid Educational Computer.
 
The circuit board has address lines for 8 KiB of PRG-RAM, though all known carts mount either no or a 2 KiB RAM chip which is then mirrored three times across the respective address range. PRG-RAM is never battery-backed; all games save the game state to a 93C66 512-byte serial EEPROM. The EEPROM's "ORG" pin is tied to GND, selecting a word size of 8 bits. There is also a spot for a second EEPROM chip that is unpopulated on all known games.
=Banks=
=Banks=
* CPU $6000-$7FFF: 0-8 KiB unbanked PRG-RAM, not battery-backed
* CPU $6000-$7FFF: 0-8 KiB unbanked PRG-RAM, not battery-backed
* CPU $8000-$BFFF: 16/32 KiB switchable PRG-ROM bank
* CPU $8000-$BFFF: 16 KiB switchable PRG-ROM bank
* CPU $C000-$FFFF: 16 KiB semi-fixed PRG-ROM bank
* CPU $8000-$FFFF: ''alternatively:'' 32 KiB swichable PRG-ROM bank
* PPU $0000-$1FFF: 8 KiB unbanked CHR-RAM
* PPU $0000-$1FFF: 8 KiB unbanked CHR-RAM
* Nametable mirroring: hard-wired
 
The circuit board has address lines for 8 KiB of PRG-RAM, though all known carts mount either no or a 2 KiB RAM chip which is then mirrored three times across the respective address range. PRG-RAM is never battery-backed; all games save the game state to a 93C66 512-byte serial EEPROM.
=Registers=
=Registers=
All registers are initialized to $00 on reset.
All registers are initialized to $00 on reset.
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   ||            PRG A14..A18=111p0 when CPU A14=1 and S=1 (fixed bank=1C or 1E)
   ||            PRG A14..A18=111p0 when CPU A14=1 and S=1 (fixed bank=1C or 1E)
   ||          1: PRG A14=CPU A14, PRG A15..A18=PPPp (BxROM, 32 KiB switchable bank)
   ||          1: PRG A14=CPU A14, PRG A15..A18=PPPp (BxROM, 32 KiB switchable bank)
  ||        Also selects nametable mirroring:
  ||          0: Forced vertical mirroring
  ||          1: Mirroring selected by $5300
   |+-------- See 'M' bit description
   |+-------- See 'M' bit description
   +--------- 1 bpp video mode: when PPU A13=0 ...
   +--------- 1 bpp video mode: when PPU A13=0 (pattern table) ...
               0: PPU A3=CPU A3, PPU A12=CPU A12 (disable 1 bpp mode)
               0: CHR A3=PPU A3, CHR A12=PPU A12 (disable 1 bpp mode)
               1: PPU A3=CPU A0, PPU A12=CPU A9, both latched during
               1: CHR A3=PPU A0, CHR A12=PPU A9, both latched on
                   last rise of PPU A13 during R/W (enable 1 bpp mode)
                   last rise of PPU A13 (enable 1 bpp mode)


* 1 bpp mode is an all points-addressable video mode that allows the 8 KiB CHR-RAM to hold just enough data for an entire screen.
* 1 bpp mode is an all points-addressable video mode that allows the 8 KiB CHR-RAM to hold just enough data for an entire screen.
* Because this register is initialized to $00 on reset, thus clearing bit 4 which causes UxROM mode, the game's reset vectors will be at the end of 16 KiB bank #31.
* Because this register is initialized to $00 on reset, thus clearing bit 4 which causes UxROM mode, the game's reset vectors will be at the end of 16 KiB bank #31.
==PRG-ROM Bank High ($5100, write)==
==PRG-ROM Bank High ($5100, write)==
  Mask: $FF00
  Mask: $FF00
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  D~7654 3210
  D~7654 3210
   ---------
   ---------
   ...S .C.D
   .T.S .C.D
      |  | +- 93C66 EEPROM DAT output
    | |  | +- 93C66 EEPROM DAT output
      |  +--- 93C66 EEPROM CLK output
    | |  +--- 93C66 EEPROM CLK output
      +------ 93C66 EEPROM CS output
    | +------ 93C66 EEPROM #1 CS output
 
    +-------- 93C66 EEPROM #2 CS output
==Unknown ($5300, write)==
==Mirroring ($5300, write)==
  Mask: $FF00
  Mask: $FF00
D~7654 3210
  ---------
  M... ....
  +--------- Nametable mirroring if $5000.4=1
              0=Horizontal
              1=Vertical


All games just write $00 to this register. Its meaning is certainly not the one seen in [[INES Mapper 162]]/163.
==Microwire Interface ($5500, read)==
==Microwire Interface ($5500, read)==
  Mask: $FF00
  Mask: $FF00
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=See also=
=See also=
* [[NES 2.0 Mapper 558]] is a later version which drops UxROM mode and connects the microwire interface to EEPROM differently.
* [[NES 2.0 Mapper 558]] is a later version which drops UxROM mode and connects the microwire interface to EEPROM differently.
* [https://forums.nesdev.org/viewtopic.php?p=257116 PCB pictures and circuit diagram]

Latest revision as of 12:44, 21 August 2022

iNES Mapper 164 denotes the ROM chipset of the 东达 (Dōngdá) PEC-9588 Pyramid Educational Computer that was later also used on the 燕城 (Yànchéng) cy2000-3 circuit board, used for the following games:

  • Final Fantasy 太空戰士 V (G-003)
  • 大話西游 (Dàhuà Xīyóu, G-004)
  • 櫻桃小丸子 (Chibi Maruku-chan, G-005)
  • 岳飛傳 (Yuèfēi Zhuàn, G-006)
  • Dark Seed - 黑暗之蛊 (G-009)
  • 口袋精靈: 金 (Pokémon: Gold Edition, not to be confused with several similarly-named ports of the same name)

The circuit board has address lines for 8 KiB of PRG-RAM, though all known carts mount either no or a 2 KiB RAM chip which is then mirrored three times across the respective address range. PRG-RAM is never battery-backed; all games save the game state to a 93C66 512-byte serial EEPROM. The EEPROM's "ORG" pin is tied to GND, selecting a word size of 8 bits. There is also a spot for a second EEPROM chip that is unpopulated on all known games.

Banks

  • CPU $6000-$7FFF: 0-8 KiB unbanked PRG-RAM, not battery-backed
  • CPU $8000-$BFFF: 16 KiB switchable PRG-ROM bank
  • CPU $C000-$FFFF: 16 KiB semi-fixed PRG-ROM bank
  • CPU $8000-$FFFF: alternatively: 32 KiB swichable PRG-ROM bank
  • PPU $0000-$1FFF: 8 KiB unbanked CHR-RAM

Registers

All registers are initialized to $00 on reset.

PRG-ROM Bank Low/1 bpp Mode Switch ($5000, write)

Mask: $FF00

D~7654 3210
  ---------
  CSQM PPPp
  ||+|-++++- PRG A18..A14 if M=0
  || | ++++- PRG A18..A15 if M=1
  || +------ PRG banking mode
  ||          0: PRG A14..A18=QPPPp when CPU A14=0 (UxROM, 16 KiB switchable bank)
  ||             PRG A14..A18=11111 when CPU A14=1 and S=0 (fixed bank=1F)
  ||             PRG A14..A18=111p0 when CPU A14=1 and S=1 (fixed bank=1C or 1E)
  ||          1: PRG A14=CPU A14, PRG A15..A18=PPPp (BxROM, 32 KiB switchable bank)
  ||         Also selects nametable mirroring:
  ||          0: Forced vertical mirroring
  ||          1: Mirroring selected by $5300
  |+-------- See 'M' bit description
  +--------- 1 bpp video mode: when PPU A13=0 (pattern table) ...
              0: CHR A3=PPU A3, CHR A12=PPU A12 (disable 1 bpp mode)
              1: CHR A3=PPU A0, CHR A12=PPU A9, both latched on
                 last rise of PPU A13 (enable 1 bpp mode)
  • 1 bpp mode is an all points-addressable video mode that allows the 8 KiB CHR-RAM to hold just enough data for an entire screen.
  • Because this register is initialized to $00 on reset, thus clearing bit 4 which causes UxROM mode, the game's reset vectors will be at the end of 16 KiB bank #31.

PRG-ROM Bank High ($5100, write)

Mask: $FF00

D~7654 3210
  ---------
  .... ..PP
         ++- PRG A20..A19

Microwire Interface ($5200, write)

Mask: $FF00

D~7654 3210
  ---------
  .T.S .C.D
   | |  | +- 93C66 EEPROM DAT output
   | |  +--- 93C66 EEPROM CLK output
   | +------ 93C66 EEPROM #1 CS output
   +-------- 93C66 EEPROM #2 CS output

Mirroring ($5300, write)

Mask: $FF00

D~7654 3210
  ---------
  M... ....
  +--------- Nametable mirroring if $5000.4=1
              0=Horizontal
              1=Vertical

Microwire Interface ($5500, read)

Mask: $FF00

D~7654 3210
  ---------
  .... .A..
        |
        |
        +--- 93C66 EEPROM DAT input (inverted)

See also

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